Abstract: A tamper-resistant packaging approach protects an integrated circuit (100) from undesirable access. According to an example embodiment of the present invention, data is encrypted as a function of the state of a plurality of magnetically-responsive circuit elements (130-135) and then decrypted as a function of the state (130-135). A package (106) is arranged to prevent access to the integrated circuit and having magnetic particles (120-125) therein. The magnetic particles (120-125) are arranged to cause the magnetically-responsive circuit elements (130-135) to take on a state that is used to encrypt the data. The state of these elements is again accordingly used to decrypt the data (e.g., as a key). When the magnetic particles are altered, for example, by removing a portion of the package, the state of one or more of the magnetically-responsive circuit elements is changed, thus rendering the state incapable of being used for decrypting the data.

Abstract: A circuit arrangement reduces the number of interrupts to a DSP required to transfer digital samples between external I/O devices and a data memory, thus allowing the DSP to perform additional sample processing operations. An interrupt accelerator responds to I/O interrupts from an I/O device by pausing the DSP, transferring samples with the data memory, and tracking the number of samples transferred. When a predetermined number of samples have been transferred, the interrupt accelerator interrupts the DSP to perform a block transfer of samples in conjunction with sample processing.

Abstract: The present invention comprises a smart retry system for agents in a computer system. The smart retry system of the present invention includes a master agent, a slave agent, an arbiter, and smart retry logic components, all adapted to be coupled to a bus. The bus permits agents coupled to the bus to communicate with the arbiter and other agents coupled to the PCI bus. The smart retry logic component of the present invention prevents a PCI master agent from accessing the bus for the purpose of attempting a retry transaction, until after the slave agent that issued the retry is ready.

Abstract: A circuit arrangement reduces the number of interrupts to a DSP required to transfer digital samples between external I/O devices and a data memory, thus allowing the DSP to perform additional sample processing operations. An interrupt accelerator responds to I/O interrupts from an I/O device by pausing the DSP, transferring samples with the data memory, and tracking the number of samples transferred. When a predetermined number of samples have been transferred, the interrupt accelerator interrupts the DSP to perform a block transfer of samples in conjunction with sample processing.

Abstract: The present invention comprises a smart retry system for agents in a computer system. The smart retry system of the present invention includes a master agent, a slave agent, an arbiter, and smart retry logic components, all adapted to be coupled to a bus. The bus permits agents coupled to the bus to communicate with the arbiter and other agents coupled to the PCI bus. The smart retry logic component of the present invention prevents a PCI master agent from accessing the bus for the purpose of attempting a retry transaction, until after the slave agent that issued the retry is ready.