Patents by Inventor Carl L. Eggerding
Carl L. Eggerding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11817262Abstract: Relatively low noise capacitors are provided for surface mounted applications. Electro-mechanical vibrations generate audible noise, which are otherwise relatively reduced through modifications to MLCC device structures, and/or their mounting interfaces on substrates such as printed circuit boards (PCBs). Different embodiments variously make use of flexible termination compliance so that surface mounting has reduced amplitude vibrations transmitted to the PCB. In other instances, side terminal and transposer embodiments effectively reduce the size of the mounting pads relative to the case of the capacitor, or a molded enclosure provides standoff, termination compliance and clamping of vibrations.Type: GrantFiled: February 10, 2021Date of Patent: November 14, 2023Assignee: KYOCERA AVX Components CorporationInventors: Andrew P. Ritter, Carl L. Eggerding
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Publication number: 20210166873Abstract: Relatively low noise capacitors are provided for surface mounted applications. Electro-mechanical vibrations generate audible noise, which are otherwise relatively reduced through modifications to MLCC device structures, and/or their mounting interfaces on substrates such as printed circuit boards (PCBs). Different embodiments variously make use of flexible termination compliance so that surface mounting has reduced amplitude vibrations transmitted to the PCB. In other instances, side terminal and transposer embodiments effectively reduce the size of the mounting pads relative to the case of the capacitor, or a molded enclosure provides standoff, termination compliance and clamping of vibrations.Type: ApplicationFiled: February 10, 2021Publication date: June 3, 2021Inventors: Andrew P. Ritter, Carl L. Eggerding
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Patent number: 10923277Abstract: Relatively low noise capacitors are provided for surface mounted applications. Electro-mechanical vibrations generate audible noise, which are otherwise relatively reduced through modifications to MLCC device structures, and/or their mounting interfaces on substrates such as printed circuit boards (PCBs). Different embodiments variously make use of flexible termination compliance so that surface mounting has reduced amplitude vibrations transmitted to the PCB. In other instances, side terminal and transposer embodiments effectively reduce the size of the mounting pads relative to the case of the capacitor, or a molded enclosure provides standoff, termination compliance and clamping of vibrations.Type: GrantFiled: January 7, 2019Date of Patent: February 16, 2021Assignee: AVX CorporationInventors: Andrew P. Ritter, Carl L. Eggerding
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Publication number: 20190244755Abstract: Relatively low noise capacitors are provided for surface mounted applications. Electro-mechanical vibrations generate audible noise, which are otherwise relatively reduced through modifications to MLCC device structures, and/or their mounting interfaces on substrates such as printed circuit boards (PCBs). Different embodiments variously make use of flexible termination compliance so that surface mounting has reduced amplitude vibrations transmitted to the PCB. In other instances, side terminal and transposer embodiments effectively reduce the size of the mounting pads relative to the case of the capacitor, or a molded enclosure provides standoff, termination compliance and clamping of vibrations.Type: ApplicationFiled: January 7, 2019Publication date: August 8, 2019Inventors: Andrew P. Ritter, Carl L. Eggerding
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Patent number: 10312028Abstract: An ultra-thin electrochemical energy storage device is provided which utilizes electrode material with multi-layer current collectors and with an organic electrolyte between the electrodes. Multiple cells may be positioned in a plurality of stacks and all of the cells may be in series, parallel or some combination thereof. The energy storage device can be constructed at less than 0.5 millimeters thick and exhibit very low ESR and higher temperature range capabilities.Type: GrantFiled: June 25, 2015Date of Patent: June 4, 2019Assignee: AVX CorporationInventors: Bharat Rawal, Carl L. Eggerding, Bob Knopsnyder
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Patent number: 10204737Abstract: Relatively low noise capacitors are provided for surface mounted applications. Electro-mechanical vibrations generate audible noise, which are otherwise relatively reduced through modifications to MLCC device structures, and/or their mounting interfaces on substrates such as printed circuit boards (PCBs). Different embodiments variously make use of flexible termination compliance so that surface mounting has reduced amplitude vibrations transmitted to the PCB. In other instances, side terminal and transposer embodiments effectively reduce the size of the mounting pads relative to the case of the capacitor, or a molded enclosure provides standoff, termination compliance and clamping of vibrations.Type: GrantFiled: June 8, 2015Date of Patent: February 12, 2019Assignee: AVX CORPORATIONInventors: Andrew P. Ritter, Carl L. Eggerding
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Publication number: 20150380175Abstract: An ultra-thin electrochemical energy storage device is provided which utilizes electrode material with multi-layer current collectors and with an organic electrolyte between the electrodes. Multiple cells may be positioned in a plurality of stacks and all of the cells may be in series, parallel or some combination thereof. The energy storage device can be constructed at less than 0.5 millimeters thick and exhibit very low ESR and higher temperature range capabilities.Type: ApplicationFiled: June 25, 2015Publication date: December 31, 2015Applicant: AVX CorporationInventors: Bharat Rawal, Carl L. Eggerding, Bob Knopsnyder
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Publication number: 20150364254Abstract: Relatively low noise capacitors are provided for surface mounted applications. Electro-mechanical vibrations generate audible noise, which are otherwise relatively reduced through modifications to MLCC device structures, and/or their mounting interfaces on substrates such as printed circuit boards (PCBs). Different embodiments variously make use of flexible termination compliance so that surface mounting has reduced amplitude vibrations transmitted to the PCB. In other instances, side terminal and transposer embodiments effectively reduce the size of the mounting pads relative to the case of the capacitor, or a molded enclosure provides standoff, termination compliance and clamping of vibrations.Type: ApplicationFiled: June 8, 2015Publication date: December 17, 2015Applicant: AVX CORPORATIONInventors: Andrew P. Ritter, Carl L. Eggerding
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Patent number: 8238116Abstract: Disclosed are apparatus and methodology for providing land grid feedthrough capacitor designs having broad applicability to signal and power filtering technologies. Such capacitor designs provide characteristics for use in decoupling applications involving both signal level and power level environments. Low equivalent series inductance (ESL) is provided by current cancellation techniques involving opposite current flow in power or signal and ground current paths through the device.Type: GrantFiled: April 2, 2008Date of Patent: August 7, 2012Assignee: AVX CorporationInventors: Carl L. Eggerding, Andrew P. Ritter
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Patent number: 7724496Abstract: The present subject matter is directed to methods and apparatus for providing a multilayer array component with interdigitated electrode layer portions configured to selectively provide signal filtering characteristics, over-voltage transient suppression capabilities, and land grid array (LGA) terminations. Embodiments of the present subject matter may define a single capacitor, a capacitor array, or a multilayer vertically integrated array with configurable equivalent electrical characteristics including equivalent series inductance (ESL), equivalent series resistance (ESR), and configurable capacitance and voltage clamping and transient suppression capabilities.Type: GrantFiled: October 31, 2006Date of Patent: May 25, 2010Assignee: AVX CorporationInventors: Carl L. Eggerding, Ronald S. Demcko, John L. Galvagni
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Patent number: 7573698Abstract: A method of forming a window via capacitor comprises a first step of providing a plurality of interleaved dielectric layers and paired electrode layers to create a multilayered arrangement characterized by top and bottom surfaces and a plurality pf side surfaces. First and second transition layer electrode portions are provided on a top surface of the multilayered arrangement on top of which a cover layer formed to define openings, or windows, therein is provided. The cover layer may be provided before device firing or may be printed on after firing using polymer or glass. Peripheral terminations are subsequently formed on the device periphery to connect selected electrode layers to respective transition layer electrode portions. Via terminations are formed in the cover layer openings, on top of which solder balls may be applied. Some of the terminations may be formed in accordance with various plating techniques as disclosed.Type: GrantFiled: September 7, 2006Date of Patent: August 11, 2009Assignee: AVX CorporationInventors: Carl L. Eggerding, Jason MacNeal, John L. Galvagni, Andrew P. Ritter
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Publication number: 20080253059Abstract: Disclosed are apparatus and methodology for providing land grid feedthrough capacitor designs having broad applicability to signal and power filtering technologies. Such capacitor designs provide characteristics for use in decoupling applications involving both signal level and power level environments. Low equivalent series inductance (ESL) is provided by current cancellation techniques involving opposite current flow in power or signal and ground current paths through the device.Type: ApplicationFiled: April 2, 2008Publication date: October 16, 2008Applicant: AVX CorporationInventors: Carl L. Eggerding, Andrew P. Ritter
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Publication number: 20080232032Abstract: A capacitor anode that is formed from ceramic particles (e.g., Nb2O5, Ta2O5) capable of being chemically reduced to form an electrically conductive composition (e.g., NbO, Ta) is provided. For instance, a slip composition containing the ceramic particles may be initially formed and deposited onto a carrier substrate in the form of a thin layer. If desired, multiple layers may be formed to achieve the target thickness for the anode. Once formed, the layer(s) are subjected to a heat treatment to chemically reduce the ceramic particles and form the electrically conductive anode. Contrary to conventional press-formed anodes, the slip-formed anodes of the present invention may exhibit a small thickness, high aspect ratio (i.e., ratio of width to thickness), and uniform density, which may in turn may lead to an improved volumetric efficiency and equivalent series resistance (“ESR”).Type: ApplicationFiled: March 20, 2007Publication date: September 25, 2008Applicant: AVX CorporationInventors: Brady Jones, Carl L. Eggerding, Allen Butler, Gang Ning, Kaye Poole, Craig William Nies
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Patent number: 4540621Abstract: A method for forming a substrate for electronic applications having a dielectric constant of less than 6 is disclosed. The method comprises admixing crystalline cordierite particles having a size of 0.1--10 microns with a binder and solvent, casting the same into a sheet, drying the cast sheet into a self-supporting green sheet and then heating the green sheet to burn out the binder and to sinter the particles together. A metallization pattern is deposited on the green sheet after the casting but before the heating, the metallization pattern being molybdenum or tungsten. The cordierite has a defined coefficient of thermal expansion. A dielectric substrate for mounting of integrated circuit devices thereon is also disclosed.Type: GrantFiled: July 29, 1983Date of Patent: September 10, 1985Inventors: Carl L. Eggerding, Edward A. Giess
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Patent number: 4407007Abstract: A process and a solid plane structure for minimizing delamination during sintering in the fabrication of multi-layer ceramic substrates, wherein the solid plane structure is designed to obtain maximum ceramic to ceramic interface contact.Type: GrantFiled: May 28, 1981Date of Patent: September 27, 1983Assignee: International Business Machines CorporationInventors: Kamalesh S. Desai, Carl L. Eggerding, John A. Ferrante, Raymond Ricci, Ernest N. Urfer
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Patent number: 4272500Abstract: A method of forming ceramic material which includes mullite (3Al.sub.2 O.sub.3.2SiO.sub.2) in any desired percentage. A particulate mixture is formed of (1) mullite in an amount of at least 5% by weight, (2) Al.sub.2 O.sub.3 in an amount to provide sufficient SiO.sub.2 to combine with Al.sub.2 O.sub.3 to form the desired mullite. The mixture is sintered to a temperature in the range of 1300.degree. C. to 1600.degree. C. wherein the Al.sub.2 O.sub.3 and SiO.sub.2 react to form mullite under the influence of the initially added mullite.Type: GrantFiled: November 6, 1979Date of Patent: June 9, 1981Assignee: International Business Machines CorporationInventors: Carl L. Eggerding, Frank Gonzales, Jr., Jerzy B. Niklewski