Abstract: An offset history table is implemented and maintained in a BLUETOOTH device and is used to pre-seed an expected frequency offset of a received signal from another BLUETOOTH device. The disclosed offset history table includes one entry for each piconet device in a particular piconet, each entry including a best guess of the relevant piconet device's frequency offset with respect to the receiving BLUETOOTH device. Using a frequency offset history table and a pre-seeded frequency offset corresponding to an expected frequency offset based on the offset value maintained in the frequency offset history table, the performance of a BLUETOOTH device can be increased in a steady state piconet scenario.

Abstract: A rotating antenna is used in a wireless system to impart a phase onto a received signal by electronically moving the effective receiving antenna location along a circular path such that the modulation phase angle indicates the bearing of the radio transmission and the gain of a signal transmitted by the antenna is increased in the direction of the received signal to enhance the link between transmitter and receiver. In order to simulate a rotating antenna, the antenna preferably comprises an antenna array having a plurality of antennae for use by one receiver. During reception of a signal from a remote transmitter, a scanner is adapted to scan through the plurality of antennae and in turn provide a signal received from each of the plurality of antennae to the receiver in the wireless system. The signal is modulated by virtue of the antenna rotation to include a Doppler frequency component.

Abstract: An offset history table is implemented and maintained in a BLUETOOTH device and is used to pre-seed an expected frequency offset of a received signal from another BLUETOOTH device. The disclosed offset history table includes one entry for each piconet device in a particular piconet, each entry including a best guess of the relevant piconet device's frequency offset with respect to the receiving BLUETOOTH device. Using a frequency offset history table and a pre-seeded frequency offset corresponding to an expected frequency offset based on the offset value maintained in the frequency offset history table, the performance of a BLUETOOTH device can be increased in a steady state piconet scenario.

Abstract: In response to a first signal having modulation representing information and a modulation index, embodiments of the present invention generate a second signal that differs from the first signal in its modulation index, and demodulate the second signal. In one embodiment, an arrangement having a signal processor is adapted to receive a first signal having modulation representing information and having a first modulation index and to generate, in response to the first signal, a second signal having frequency modulation representing the information and having a second modulation index different from the first modulation index, and a demodulator coupled to the signal processor so as to receive and demodulate the second signal.

Abstract: A method and apparatus to perform a real-time drift correction of a local oscillator in a wireless device such as a cordless telephone, and/or to perform software-based frequency tracking of the local oscillator. With respect to the real-time drift correction, the remote handset periodically wakes from a sleep mode and goes into a normal link verification mode. Once in the link verification mode, the remote handset enters a time division duplexing (TDD) mode and attempts to establish a link with a base unit based on the timing of the TDD data frame. After the remote handset establishes a link with the base unit, the remote handset requests a security word from the base unit. Upon receiving the requested security word, the remote handset determines if the requested security word matches a security word of the remote handset. The remote handset implements a software frequency adjustment of its local oscillator.

Abstract: A cost-effective continuous phase logic-based modulator and demodulator are provided to allow communications using binary frequency shift keying (BFSK) as well as M-ary FSK techniques. The modulator of the 1-bit precision modem architecture is based on a 1-bit precision numerically controlled oscillator (NCO), which provides complete programmability with respect to a frequency of the 1-bit precision logic-based modulator and/or demodulator. The 1-bit precision NCO includes an adder and a phase accumulator register which is clocked by a master clock signal. A two-input multiplexer has a single bit symbol value to generate BFSK, or larger input multiplexers can be implemented to provide M-ary FSK. The output of the 1-bit precision NCO is upconverted to an intermediate frequency using a simple logic function, i.e., XNOR logic. Alternatively, the intermediate frequency may be arrived at without the need for upconversion by directly utilizing a harmonic alias at a desired IF frequency.

Abstract: A digital phase locked loop (PLL) frequency synthesizer includes a 1-bit numerically controlled oscillator (NCO) to negate the requirement that a VCO frequency be an integer multiple of its reference frequency. Thus, in accordance with the principles of the present invention, a direct digital synthesizer (DDS) or numerically controlled oscillator (NCO) is used to form a frequency divider in a feedback path of a PLL. Thus, a synthesizer with fine frequency control and very fast settling time is disclosed. The conventional integer-ratio relationship between the reference frequency fREF and the synthesized output frequency signal fVCO is overcome by replacement of a conventional VCO divider in a feedback path of a digital PLL with a 1-bit NCO. This allows the reference frequency fREF to be greater than the channel spacing, i.e., the channel spacing can be smaller than the reference frequency fREF.

Abstract: In response to a first signal having modulation representing information and a modulation index, embodiments of the present invention generate a second signal that differs from the first signal in its modulation index, and demodulate the second signal. In one embodiment, an arrangement having a signal processor is adapted to receive a first signal having modulation representing information and having a first modulation index and to generate, in response to the first signal, a second signal having frequency modulation representing the information and having a second modulation index different from the first modulation index, and a demodulator coupled to the signal processor so as to receive and demodulate the second signal.

Abstract: An offset history table is implemented and maintained in a BLUETOOTH device and is used to pre-seed an expected frequency offset of a received signal from another BLUETOOTH device. The disclosed offset history table includes one entry for each piconet device in a particular piconet, each entry including a best guess of the relevant piconet device's frequency offset with respect to the receiving BLUETOOTH device. Using a frequency offset history table and a pre-seeded frequency offset corresponding to an expected frequency offset based on the offset value maintained in the frequency offset history table, the performance of a BLUETOOTH device can be increased in a steady state piconet scenario.

Abstract: A cost-effective continuous phase logic-based modulator and demodulator are provided to allow communications using binary frequency shift keying (BFSK) as well as M-ary FSK techniques. The modulator of the 1-bit precision modem architecture is based on a 1-bit precision numerically controlled oscillator (NCO), which provides complete programmability with respect to a frequency of the 1-bit precision logic-based modulator and/or demodulator. The output of the 1-bit precision NCO is upconverted to an intermediate frequency using a simple logic function, i.e., XNOR logic. The undesirable portion of the upconverted signal may be suppressed using I/Q image rejection, and/or an appropriate bandpass filter may be used. A band limited, hard limited signal at the high IF is presented to the 1-bit precision demodulator as a receive IF signal, which is treated as a 1-bit quantization of the signal. The receive IF signal is digitally down-converted to a low IF signal to produce an alias signal at the low IF frequency.

Abstract: The present invention provides a novel direct digital synthesis system architecture which employs a numerically-controlled oscillator (NCO), some decoding logic, and a sine-weighted digital-to-analog converter (DAC) with significantly fewer output values required than conventional DDS systems to provide improved spurious performance (relative to the number of bits of resolution required of the DAC), extended frequency of operation, reduced chip area, and reduced power consumption relative to conventional DDS techniques. The output of the decoder is input to a sine-weighted digital-to-analog converter (DAC). Importantly, the sine-weighted DAC outputs a constant number of samples per cycle using a relatively few number of taps. Although there are significantly fewer taps in the sine-weighted DAC as compared to the linear DAC in conventional DDS systems, each tap of the sine-weighted DAC has a high degree of accuracy, e.g., 16-18 bits.

Abstract: A cost-effective continuous phase logic-based modulator and demodulator are provided to allow communications using binary frequency shift keying (BFSK) as well as M-ary FSK techniques. The modulator of the 1-bit precision modem architecture is based on a 1-bit precision numerically controlled oscillator (NCO), which provides complete programmability with respect to a frequency of the 1-bit precision logic-based modulator and/or demodulator. The 1-bit precision NCO includes an adder and a phase accumulator register which is clocked by a master clock signal. A two-input multiplexer has a single bit symbol value to generate BFSK, or larger input multiplexers can be implemented to provide M-ary FSK. The output of the 1-bit precision NCO is upconverted to an intermediate frequency using a simple logic function, i.e., XNOR logic. Alternatively, the intermediate frequency may be arrived at without the need for upconversion by directly utilizing a harmonic alias at a desired IF frequency.

Abstract: An error-correction process enables or disables error-correction in a cellular or wireless unit so as to conserve power of a battery or other power storage unit of the cellular or wireless unit. The error-correction process includes receiving a datablock having a checksum value and an encoded payload, the encoded payload includes one or more parity bits for error-correction of bit values within the encoded payload. If the checksum value is equivalent to a checksum value calculated for the encoded payload, then the error-correction process removes the parity bits from the encoded payload and provides the remaining encoded payload bits as the error-corrected data. Otherwise, if the checksum and calculated checksum are not equivalent, error-correction of the encoded payload is enabled.

Abstract: A digital phase locked loop (PLL) frequency synthesizer having the conventional voltage controlled oscillator (VCO) divider in the feedback loop to the phase detector replaced with a direct digital synthesizer (DDS) divider. In accordance with the principles of the present invention, the reference divider in the input path may also be replaced with a DDS divider. Moreover, a new architecture for the phase detector and current digital-to-analog converter (DAC) which operate on the instantaneous phase of each DDS is provided. Thus, in accordance with the principles of the present invention, the update rate of the digital PLL frequency synthesizer is not based on the frequency signal output from the reference divider in the input path (as in conventional digital PLL frequency synthesizer architectures). Rather, the update rate is based on fixed clock signals output from the clock generator, which utilizes the master clock and the output frequency, in accordance with the principles of the present invention.

Abstract: For use with a first transceiver, a system for, and method of, calibrating a first image reject mixer in the first transceiver and having first and second image products. In one embodiment, the system includes: (1) a second image reject mixer, associated with a second transceiver and tuned to a rejected one of the first and second image products. The system further includes a signal strength circuit, coupled to the second image reject mixer, that determines a signal strength of the rejected one. The system still further includes a trimmer, associated with the first image reject mixer, that trims the first image reject mixer to move the rejected one toward an optimal value of the signal strength.

Abstract: The intelligent alarm system of the present invention provides a reliable, low cost system for alerting a user to the presence of snow outside of a building. The system includes a sensor and an intelligent alarm clock for use inside a building or dwelling. The system can be set by a user to signal an alarm a programmable amount of time earlier or later than the user's normal waking time if an accumulation of snow is detected. The system is capable of processing preprogrammed data, user entered data and data accumulated from the sensor to determine whether a true snow condition exists and to generate an appropriate alarm signal.

Abstract: An improved system and method for modulation, demodulation and signal processing for single sideband communications systems which provides correction for the adverse effects of rapid fading characteristics in a mobile environment. The system provides modulation through a modified Weaver modulator in which the audio input is processed to produce an output in the form of an upper sideband having a pilot tone in a spectral gap at approximately midband. The receiver includes a modified Weaver demodulator and a correction signal generating circuit which processes the received faded audio input and pilot tone to produce a correcting signal. The correcting signal is mixed with the received signal to regenerate unfaded versions of both the signal and pilot by removing random amplitude and phase modulations imposed on them by the fading.