Patents by Inventor Carl Taussig
Carl Taussig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11087644Abstract: A display (100) primarily intended for use on an external surface of a building comprises a weatherproof housing (310, 340); a bistable electro-optic medium (326) enclosed within and visible through the housing; an electrode (324, 330) enclosed within the weatherproof housing and arranged to drive the electro-optic medium; a power source (504) enclosed within the weatherproof housing; data receiving means (508) enclosed within the weatherproof housing and arranged to receive data wirelessly from a source outside the weatherproof housing; and display drive means (510) arranged to receive data from the data receiving means and power from the power source, and to control the potential of the electrode.Type: GrantFiled: July 27, 2020Date of Patent: August 10, 2021Assignee: E Ink CorporationInventors: Richard J. Paolini, Jr., Carl Taussig, Seth J. Bishop, David Victor Marcolin, Russell J. Dewitte
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Patent number: 10976634Abstract: Electro-optic, especially electrophoretic, displays are used in variety of architectural and furniture applications, including a tile (100) comprising an electro-optic layer (110) capable of changing the color of the file, front and multiple rear electrodes and a light-transmissive polymeric layer (102), the exposed surface of which is textured to provide a plurality of facets inclined to the plane of the tile (100), the rear electrodes being aligned with the facets. A variable color writable board is also provided.Type: GrantFiled: November 21, 2018Date of Patent: April 13, 2021Assignee: E Ink CorporationInventors: Richard J. Paolini, Jr., Michael D. McCreary, Carl Taussig, Paul Apen, George G. Harris, Sunil Krishna Sainis, Joseph Fillion
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Publication number: 20200357309Abstract: A display (100) primarily intended for use on an external surface of a building comprises a weatherproof housing (310, 340); a bistable electro-optic medium (326) enclosed within and visible through the housing; an electrode (324, 330) enclosed within the weatherproof housing and arranged to drive the electro-optic medium; a power source (504) enclosed within the weatherproof housing; data receiving means (508) enclosed within the weatherproof housing and arranged to receive data wirelessly from a source outside the weatherproof housing; and display drive means (510) arranged to receive data from the data receiving means and power from the power source, and to control the potential of the electrode.Type: ApplicationFiled: July 27, 2020Publication date: November 12, 2020Inventors: Richard J. PAOLINI, JR., Carl TAUSSIG, Seth J. BISHOP, David Victor MARCOLIN, Russell J. DEWITTE
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Publication number: 20190205077Abstract: A display (100) primarily intended for use on an external surface of a building comprises a weatherproof housing (310, 340); a bistable electro-optic medium (326) enclosed within and visible through the housing; an electrode (324, 330) enclosed within the weatherproof housing and arranged to drive the electro-optic medium; a power generating means (504) enclosed within the weatherproof housing; data receiving means (508) enclosed within the weatherproof housing and arranged to receive data wirelessly from a source outside the weatherproof housing; and display drive means (510) arranged to receive data from the data receiving means and power from the power generating means, and to control the potential of the electrode.Type: ApplicationFiled: March 8, 2019Publication date: July 4, 2019Inventors: Richard J. PAOLINI, JR., Carl TAUSSIG, Seth J. BISHOP, David Victor MARCOLIN, Russell J. DEWITTE
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Publication number: 20190094646Abstract: Electro-optic, especially electrophoretic, displays are used in variety of architectural and furniture applications, including a tile (100) comprising an electro-optic layer (110) capable of changing the color of the file, front and multiple rear electrodes and a light-transmissive polymeric layer (102), the exposed surface of which is textured to provide a plurality of facets inclined to the plane of the tile (100), the rear electrodes being aligned with the facets. A variable color writable board is also provided.Type: ApplicationFiled: November 21, 2018Publication date: March 28, 2019Inventors: Richard J. PAOLINI, Jr., Michael D. MCCREARY, Carl TAUSSIG, Paul APEN, George G. HARRIS, Sunil Krishna SAINIS, Joseph FILLION
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Patent number: 10175550Abstract: Electro-optic, especially electrophoretic, displays are used in variety of architectural and furniture applications, including a tile (100) comprising an electro-optic layer (110) capable of changing the color of the file, front and multiple rear electrodes and a light-transmissive polymeric layer (102), the exposed surface of which is textured to provide a plurality of facets inclined to the plane of the tile (100), the rear electrodes being aligned with the facets. A variable color writable board is also provided.Type: GrantFiled: November 6, 2015Date of Patent: January 8, 2019Assignee: E Ink CorporationInventors: Richard J. Paolini, Jr., Michael D. McCreary, Carl Taussig, Paul Apen, George G. Harris, Joseph Fillion
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Patent number: 9806258Abstract: An example provides a method for forming an apparatus including a substrate imprinted with a pattern for forming isolated device regions. A method may include imprinting an unpatterned area of a substrate with a pattern to form a patterned substrate having a plurality of recessed regions at a first level and a plurality of elevated regions at a second level, and depositing a first layer of conductive material over the patterned substrate with a plurality of breaks to form a plurality of bottom electrodes. The method may include depositing a layer of an active stack, with a second layer of conductive material, over the plurality of bottom electrodes to form a plurality of devices on the plurality of recessed regions isolated from each other by the plurality of elevated regions.Type: GrantFiled: March 29, 2013Date of Patent: October 31, 2017Assignee: APPLIED MATERIALS, INC.Inventors: James A. Brug, Lihua Zhao, Carl A. Taussig
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Patent number: 9583387Abstract: Circuit fabrication uses a multilevel mask to pattern a first conductor layer of a multilayer circuit. The first conductor patterning is to provide electrical isolation between the first conductor layer and a second conductor layer that one of overlies the multilevel mask and underlies the multilevel mask. With the second conductor layer overlying the multilevel mask, the electrical isolation is provided by undercutting the multilevel mask. Alternatively, with the second conductor underlying the multilevel mask, the first conductor includes a bridged gapped conductor and the electrical isolation may be provided by both the bridged gapped conductor and an insulating layer between the second conductor layer and the first conductor layer.Type: GrantFiled: April 30, 2013Date of Patent: February 28, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Ping Mei, Carl A. Taussig, Marcia Almanza-Workman
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Publication number: 20170052753Abstract: A display (100) primarily intended for use on an external surface of a building comprises a weatherproof housing (310, 340); a bistable electro-optic medium (326) enclosed within and visible through the housing; an electrode (324, 330) enclosed within the weatherproof housing and arranged to drive the electro-optic medium; a power generating means (504) enclosed within the weatherproof housing; data receiving means (508) enclosed within the weatherproof housing and arranged to receive data wirelessly from a source outside the weatherproof housing; and display drive means (510) arranged to receive data from the data receiving means and power from the power generating means, and to control the potential of the electrode.Type: ApplicationFiled: August 19, 2016Publication date: February 23, 2017Inventors: Richard J. Paolini, JR., Carl Taussig, Seth J. Bishop, David Victor MARCOLIN, Russell J. DeWitte
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Publication number: 20160259225Abstract: Electro-optic, especially electrophoretic, displays are used in variety of architectural and furniture applications, including a tile (100) comprising an electro-optic layer (110) capable of changing the color of the file, front and multiple rear electrodes and a light-transmissive polymeric layer (102), the exposed surface of which is textured to provide a plurality of facets inclined to the plane of the tile (100), the rear electrodes being aligned with the facets. A variable color writable board is also provided.Type: ApplicationFiled: November 6, 2015Publication date: September 8, 2016Inventors: Richard J. Paolini, JR., Michael D. McCreary, Carl Taussig, Paul Apen, George G. Harris, Sunil Krishna Sainis, Joseph Fillion
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Publication number: 20160111328Abstract: Circuit fabrication uses a multilevel mask to pattern a first conductor layer of a multilayer circuit. The first conductor patterning is to provide electrical isolation between the first conductor layer and a second conductor layer that one of overlies the multilevel mask and underlies the multilevel mask. With the second conductor layer overlying the multilevel mask, the electrical isolation is provided by undercutting the multilevel mask. Alternatively, with the second conductor underlying the multilevel mask, the first conductor includes a bridged gapped conductor and the electrical isolation may be provided by both the bridged gapped conductor and an insulating layer between the second conductor layer and the first conductor layer.Type: ApplicationFiled: April 30, 2013Publication date: April 21, 2016Inventors: Ping MEI, Carl A. TAUSSIG, Marcia ALMANZA-WORKMAN
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Publication number: 20160056379Abstract: An example provides a method for forming an apparatus including a substrate imprinted with a pattern for forming isolated device regions. A method may include imprinting an unpatterned area of a substrate with a pattern to form a patterned substrate having a plurality of recessed regions at a first level and a plurality of elevated regions at a second level, and depositing a first layer of conductive material over the patterned substrate with a plurality of breaks to form a plurality of bottom electrodes. The method may include depositing a layer of an active stack, with a second layer of conductive material, over the plurality of bottom electrodes to form a plurality of devices on the plurality of recessed regions isolated from each other by the plurality of elevated regions.Type: ApplicationFiled: March 29, 2013Publication date: February 25, 2016Inventors: James A. BRUG, Lihua ZHAO, Carl A. TAUSSIG
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Patent number: 8318610Abstract: Provided is a thin film device and an associated method of making a thin film device. For example, fabrication of an inverter thin film device is described. Moreover, a parallel spaced electrically conductive strips are provided upon a substrate. A functional material is deposited upon the conductive strips. A 3D structure is then provided upon the functional material, the 3D structure having a plurality of different heights, at least one height defining a first portion of the conductive strips to be bundled. The 3D structure and functional material are then etched to define a TFD disposed above the first portion of the conductive strips. The first portion of the conductive strips is bundled adjacent to the TFD.Type: GrantFiled: June 29, 2011Date of Patent: November 27, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ping Mei, Hao Luo, Carl Taussig
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Patent number: 8305096Abstract: An apparatus and method for measuring and monitoring layer properties in web-based processes are described. The apparatus includes multiple electrode devices adjacently positioned on a surface of a web material, which advances with a predetermined speed. The electrode devices perform measurements of electrical parameters of a layer of the web material and provide an electrical signal to a layer deposition system for further adjustment of layer properties of the layer.Type: GrantFiled: October 30, 2006Date of Patent: November 6, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Warren Jackson, Carl Taussig
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Patent number: 8269221Abstract: Provided is a thin film device and an associated method of making a thin film device. For example, a thin film transistor with nano-gaps in the gate electrode. The method involves providing a substrate. Upon the substrate are then provided a plurality of parallel spaced electrically conductive strips. A plurality of thin film device layers are then deposited upon the conductive strips. A 3D structure is provided upon the plurality of thin film device layers, the structure having a plurality of different heights. The 3D structure and the plurality of thin film device layers are then etched to define a thin film device, such as for example a thin film transistor that is disposed above at least a portion of the conductive strips.Type: GrantFiled: January 24, 2008Date of Patent: September 18, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ping Mei, Albert Jeans, Carl Taussig
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Patent number: 8097400Abstract: Provided is a low cost system and method for forming electronic devices, especially large surface area devices. The process of imprint lithography is combined with alternate manufacturing techniques to fabricate the devices. Initially, a template imprints a three-dimensional pattern into a resist layer deposited on a flexible substrate. The resist layer is cured using ultraviolet light or other curing techniques. After curing, the 3-D pattern is modified using one of several techniques to include inkjetting, electrodeposition or laser patterning. In one embodiment, a semi-fluid material may be jetted into channels formed in the pattern, thereby forming conductive or insulating lead lines. Alternatively, a two-dimensional pattern may be jetted onto the resist layer. Final processing may include multiple etch-mask-etch steps. The integration of techniques into a single system provides a low cost, efficient method for manufacturing high quality, large surface area electronic devices.Type: GrantFiled: February 22, 2005Date of Patent: January 17, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Warren Jackson, Carl Taussig, Ping Mei
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Publication number: 20110256725Abstract: Provided is a thin film device and an associated method of making a thin film device. For example, fabrication of an inverter thin film device is described. Moreover, a parallel spaced electrically conductive strips are provided upon a substrate. A functional material is deposited upon the conductive strips. A 3D structure is then provided upon the functional material, the 3D structure having a plurality of different heights, at least one height defining a first portion of the conductive strips to be bundled. The 3D structure and functional material are then etched to define a TFD disposed above the first portion of the conductive strips. The first portion of the conductive strips is bundled adjacent to the TFD.Type: ApplicationFiled: June 29, 2011Publication date: October 20, 2011Inventors: Ping Mei, Hao Luo, Carl Taussig
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Patent number: 7994509Abstract: Provided is a thin film device and an associated method of making a thin film device. For example, fabrication of an inverter thin film device is described. Moreover, a parallel spaced electrically conductive strips are provided upon a substrate. A functional material is deposited upon the conductive strips. A 3D structure is then provided upon the functional material, the 3D structure having a plurality of different heights, at least one height defining a first portion of the conductive strips to be bundled. The 3D structure and functional material are then etched to define a TFD disposed above the first portion of the conductive strips. The first portion of the conductive strips is bundled adjacent to the TFD.Type: GrantFiled: November 1, 2005Date of Patent: August 9, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ping Mei, Hao Luo, Carl Taussig
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Patent number: 7817129Abstract: An integrated line selection apparatus within active matrix arrays is described. The circuit includes multiple gate line drive transistor devices, each gate line drive transistor device having a drain coupled to a gate line of multiple gate lines in a gate line driver circuit coupled to an active matrix array and a source to receive an input signal. The circuit further includes at least one address line transistor device corresponding to each gate line transistor device, each address line transistor device having a drain coupled to a gate of the corresponding gate line drive transistor device and a gate coupled to a corresponding address line, such that by asserting a predetermined combination of voltages on the plurality of address lines, a single gate line of said plurality of gate lines is selected to receive the input signal to be transmitted to a corresponding pixel within the corresponding active matrix array.Type: GrantFiled: October 30, 2006Date of Patent: October 19, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Warren Jackson, Carl Taussig, Hao Luo
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Publication number: 20080185591Abstract: Provided is a thin film device and an associated method of making a thin film device. For example, a thin film transistor with nano-gaps in the gate electrode. The method involves providing a substrate. Upon the substrate are then provided a plurality of parallel spaced electrically conductive strips. A plurality of thin film device layers are then deposited upon the conductive strips. A 3D structure is provided upon the plurality of thin film device layers, the structure having a plurality of different heights. The 3D structure and the plurality of thin film device layers are then etched to define a thin film device, such as for example a thin film transistor that is disposed above at least a portion of the conductive strips.Type: ApplicationFiled: January 24, 2008Publication date: August 7, 2008Inventors: Ping Mei, Albert Jeans, Carl Taussig