Patents by Inventor Carl W. Berlin

Carl W. Berlin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170098750
    Abstract: An assembly for coupling thermally a thermoelectric generator (TEG) to an exhaust manifold includes a first heat-exchanger, a first dielectric-layer, a TEG, and a direct-bond-copper-arrangement (DBC). The first dielectric-layer overlies a portion of the outer surface of the first heat-exchanger. The first dielectric-layer is formed by firing a thick-film dielectric material onto the stainless steel of the first heat-exchanger. The TEG defines a first contact suitable to be coupled thermally and electrically to the first conductor-layer. The DBC is interposed between the first dielectric-layer and the first contact of the TEG. The DBC is formed by an adhesion-layer formed of high-adhesion-copper-thick-film in contact with the first dielectric-layer, a bond-layer formed of copper-thick-film that overlies and is in contact with the adhesion-layer opposite the first-dielectric-layer, and a copper-foil-layer that overlies and is in contact with the bond-layer opposite the adhesion-layer.
    Type: Application
    Filed: October 2, 2015
    Publication date: April 6, 2017
    Inventors: Carl W. Berlin, Scott D. Brandenburg, Bruce A. Myers
  • Patent number: 9299496
    Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: March 29, 2016
    Assignees: Delphi Technologies, Inc., UChicago Argonne, LLC
    Inventors: Manuel Ray Fairchild, Ralph S. Taylor, Carl W. Berlin, Celine Wk Wong, Beihai Ma, Uthamalingam Balachandran
  • Publication number: 20160027580
    Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.
    Type: Application
    Filed: October 2, 2015
    Publication date: January 28, 2016
    Inventors: Manuel Ray Fairchild, Ralph S. Taylor, Carl W. Berlin, Celine Wk Wong, Beihai Ma, Uthamalingam Balachandran
  • Patent number: 9230739
    Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: January 5, 2016
    Assignee: UChicago Argonne, LLC
    Inventors: M. Ray Fairchild, Ralph S. Taylor, Carl W. Berlin, Celine W K Wong, Beihai Ma, Uthamalingam Balachandran
  • Publication number: 20150116894
    Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.
    Type: Application
    Filed: October 29, 2013
    Publication date: April 30, 2015
    Inventors: M. RAY FAIRCHILD, RALPH S. TAYLOR, CARL W. BERLIN, CELINE WK WONG, BEIHAI MA, UTHAMALINGAM BALACHANDRAN
  • Patent number: 8987875
    Abstract: An assembly for packaging one or more electronic devices in die form. The assembly includes substrates on opposite sides of the assembly, with lead frames between the electronic devices and the substrates. The substrates, lead frames, and electronic devices are sintered together using silver-based sintering paste between each layer. The material and thicknesses of the substrates and lead frames are selected so stress experienced by the electronic devices caused by changes in temperature of the assembly are balanced from the center of the assembly, thereby eliminating the need for balancing stresses at a substrate level by applying substantially matching metal layers to both sides of the substrates.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 24, 2015
    Assignee: Delphi Technologies, Inc.
    Inventors: Carl W. Berlin, Gary L. Eesley
  • Publication number: 20140252578
    Abstract: An assembly for packaging one or more electronic devices in die form. The assembly includes substrates on opposite sides of the assembly, with lead frames between the electronic devices and the substrates. The substrates, lead frames, and electronic devices are sintered together using silver-based sintering paste between each layer. The material and thicknesses of the substrates and lead frames are selected so stress experienced by the electronic devices caused by changes in temperature of the assembly are balanced from the center of the assembly, thereby eliminating the need for balancing stresses at a substrate level by applying substantially matching metal layers to both sides of the substrates.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 11, 2014
    Applicant: DELPHI TECHNOLOGIES, INC.
    Inventors: CARL W. BERLIN, GARY L. EESLEY
  • Patent number: 8699225
    Abstract: A liquid cooled power electronics assembly configured to use electrically conductive coolant to cool power electronic devices that uses dielectric plates sealed with a metallic seal around the perimeter of the dielectric plates to form a device assembly, and then forms another metallic seal between the device assembly and a housing. The configuration allows for more direct contact between the electronic device and the coolant, while protecting the electronic device from contact with potentially electrically conductive coolant. Material used to form the dielectric plates and the housing are selected to have similar coefficients of thermal expansion (CTE) so that the reliability of the seals is maximized.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: April 15, 2014
    Assignee: Delphi Technologies, Inc.
    Inventors: Scott D. Brandenburg, Richard D. Parker, Erich W. Gerbsch, Gary L. Eesley, Carl W. Berlin
  • Publication number: 20130258592
    Abstract: A liquid cooled power electronics assembly configured to use electrically conductive coolant to cool power electronic devices that uses dielectric plates sealed with a metallic seal around the perimeter of the dielectric plates to form a device assembly, and then forms another metallic seal between the device assembly and a housing. The configuration allows for more direct contact between the electronic device and the coolant, while protecting the electronic device from contact with potentially electrically conductive coolant. Material used to form the dielectric plates and the housing are selected to have similar coefficients of thermal expansion (CTE) so that the reliability of the seals is maximized.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 3, 2013
    Applicant: DELPHI TECHNOLOGIES, INC.
    Inventors: SCOTT D. BRANDENBURG, RICHARD D. PARKER, ERICH W. GERBSCH, GARY L. EESLEY, CARL W. BERLIN
  • Publication number: 20120243070
    Abstract: A display for displaying images that includes a transreflective electrowetting layer operable to a transparent-state where light passes through the transreflective electrowetting layer and a reflective-state where light is reflected by the transreflective electrowetting layer; a non-reflective layer underlying the transreflective electrowetting layer; and an emissive layer proximate to the transreflective electrowetting layer. The display combines light emitting elements such as OLED's with transreflective electrowetting elements to provide a display that can operate in high ambient light conditions without undesirably high power dissipation by the OLED's, and can operate under low ambient light or no ambient light conditions.
    Type: Application
    Filed: March 25, 2011
    Publication date: September 27, 2012
    Applicant: DELPHI TECHNOLOGIES, INC.
    Inventors: FREDERICK F. KUHLMAN, ANDREW P. HARBACH, CARL W. BERLIN
  • Patent number: 7737818
    Abstract: An embedded resistor and capacitor circuit and fabrication method is provided. The circuit includes a substrate, a conductive foil laminated to the substrate, and a thick film dielectric material disposed on the conductive foil. One or more thick film electrodes are formed on the dielectric material and a thick film resistor is formed at least partially contacting the thick film electrodes. A capacitor is formed by an electrode and the conductive foil. The electrodes serve as terminations for the resistor and capacitor.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: June 15, 2010
    Assignee: Delphi Technologies, Inc.
    Inventors: Aleksandra Djordjevic, Carl W. Berlin
  • Patent number: 7586444
    Abstract: A high-frequency Electromagnetic Bandgap (EBG) device, and a method for making the device are provided. The device includes a first substrate including multiple conducting vias forming a periodic lattice. The vias of the first substrate extend from the lower surface of the first substrate to the upper surface of the first substrate. The device also includes a second substrate having multiple conducting vias forming a periodic lattice. The vias of the second substrate extend from the lower surface of the second substrate to the upper surface of the second substrate. The second substrate is positioned adjacent to, and overlapping, the first substrate, such that the lower surface of the second substrate is in contact with the upper surface of the first substrate, and such that a plurality of vias of the second substrate are in contact with a corresponding plurality of vias of the first substrate.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: September 8, 2009
    Assignee: Delphi Technologies, Inc.
    Inventors: Carl W. Berlin, Deepukumar M. Nair
  • Publication number: 20090179726
    Abstract: An inductor and method of containing a magnetic field is provided. The inductor includes a first set of layers wound in a first predetermined direction, wherein each layer of the first set of layers is electrically connected to one another, and a second set of layers wound in a second predetermined direction, wherein each layer of the second set of layers is electrically connected to one another and the first set of layers, and the second set of layers is between a top layer and a bottom layer, such that the top layer forms a first pair with a first layer of the second set of layers, and the bottom layer forms a second pair with a second layer of the second set of layers so that the magnetic field is substantially contained, such as to remain substantially within a gap defined between each layer of the pairs of layers.
    Type: Application
    Filed: January 10, 2008
    Publication date: July 16, 2009
    Inventors: Carl W. Berlin, David W. Zimmerman, Aleksandra Djordjevic
  • Publication number: 20090040010
    Abstract: An embedded resistor and capacitor circuit and fabrication method is provided. The circuit includes a substrate, a conductive foil laminated to the substrate, and a thick film dielectric material disposed on the conductive foil. One or more thick film electrodes are formed on the dielectric material and a thick film resistor is formed at least partially contacting the thick film electrodes. A capacitor is formed by an electrode and the conductive foil. The electrodes serve as terminations for the resistor and capacitor.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 12, 2009
    Inventors: Aleksandra Djordjevic, Carl W. Berlin
  • Publication number: 20090001546
    Abstract: An electrically isolated and thermally conductive double-sided pre-packaged integrated circuit component exhibiting excellent heat dissipative properties, durability and strength, and which can be manufactured at a low cost includes electrically insulated and thermally conductive substrate members having outer surfaces, ultra-thick thick film materials secured to the outer surfaces of the substrate members and a lead member and a transistor member positioned between the substrate members.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 1, 2009
    Inventors: Lynda G. Flederbach, Rick A. Weed, Bradley H. Carter, Erich W. Gerbsch, John K. Isenberg, Carl W. Berlin
  • Publication number: 20080218932
    Abstract: An embedded capacitor method and system is provided for printed circuit boards. The capacitor structure is embedded within an insulator substrate, minimizes real-estate usage, provides a high capacitance, enhances capacitance density, and yet forms an advantageous planar surface topography. A cavity is defined within and contained by an insulator substrate layer, and a dielectric material at least partially fills the cavity. The dielectric material is connected to an electrical conductor, and vias are used for interconnections and traces. In an aspect, a plurality of stacked insulator substrate layers define a plurality of cavities filled with the dielectric material, providing even greater capacitance. In another aspect, an array of cavities is formed in the insulator substrate layer.
    Type: Application
    Filed: March 8, 2007
    Publication date: September 11, 2008
    Inventors: Carl W. Berlin, Dwadasi H. R. Sarma, William J. Chappell, Eric E. Hoppenjans
  • Publication number: 20080142911
    Abstract: A high-frequency Electromagnetic Bandgap (EBG) motion sensor device, and a method for making such a device are provided. The device includes a substantially planar substrate including multiple conducting vias forming a periodic lattice in the substrate. The vias extend from the lower surface of the substrate to the upper surface of the substrate. The device also includes a movable defect positioned in the periodic lattice. The movable defect is configured to move relative to the plurality of vias. A resonant frequency of the Electromagnetic Bandgap (EBG) motion sensor device varies based on movement of the movable defect.
    Type: Application
    Filed: December 14, 2006
    Publication date: June 19, 2008
    Inventors: Carl W. Berlin, Deepukumar M. Nair, David W. Zimmerman, Dwadasi H.R. Sarma
  • Publication number: 20080129645
    Abstract: A high-frequency Electromagnetic Bandgap (EBG) device, and a method for making the device are provided. The device includes a first substrate including multiple conducting vias forming a periodic lattice. The vias of the first substrate extend from the lower surface of the first substrate to the upper surface of the first substrate. The device also includes a second substrate having multiple conducting vias forming a periodic lattice. The vias of the second substrate extend from the lower surface of the second substrate to the upper surface of the second substrate. The second substrate is positioned adjacent to, and overlapping, the first substrate, such that the lower surface of the second substrate is in contact with the upper surface of the first substrate, and such that a plurality of vias of the second substrate are in contact with a corresponding plurality of vias of the first substrate.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 5, 2008
    Inventors: Carl W. Berlin, Deepukumar M. Nair
  • Patent number: 7307841
    Abstract: An electronic package having circulated submersed cooling fluid and method are provided. The electronic package has a housing defining a sealed enclosure and electronic devices located in the housing. The electronic devices have thermal emitting electrical circuitry. A dielectric fluid, such as a liquid, is located in the housing in heat transfer relationship with the electronic devices. A fluid circulator, such as a piezo fan, is located in the housing in contact with the dielectric liquid for circulating the dielectric liquid to cool the electronic devices.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: December 11, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Carl W. Berlin, Suresh K. Chengalva, Scott D. Brandenburg, Bruce A. Myers
  • Patent number: 7269017
    Abstract: A circuit board assembly with a substrate having a laminate construction of ceramic layers, such as an LTCC ceramic substrate. The substrate is configured for the purpose of improving the thermal management of power circuit devices mounted to the substrate. Thermally-conductive vias extend through the substrate from a first surface thereof to a second surface thereof. A circuit device is mounted to the first surface of the substrate and is electrically interconnected to conductor lines of the substrate. The device is also thermally coupled to the thermally-conductive vias with a first solder material. A heat sink located adjacent the second surface of the substrate is bonded to the thermally-conductive vias with a second solder material, such that the first solder material, the thermally-conductive vias, and the second solder material define a thermal path from the device to the heat sink.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: September 11, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Carl W. Berlin, Dwadasi Hara Rama Sarma, Bruce A. Myers