Abstract: The invention relates to subtilase variants and detergent compositions comprising the variants, as well as methods of producing the variants and methods for stabilizing a subtilase variant.

Abstract: A method of docking an accessory device includes, at the accessory device, receiving (324) a first transmission energy for wireless charging from an electronic device; in accordance with receiving the first transmission energy: setting (326) a timer, and entering (328) a docked mode; and exiting (330) the docked mode upon expiration of the timer.

Abstract: Provided herein are high energy ion beam generator systems and methods that provide low cost, high performance, robust, consistent, uniform, low gas consumption and high current/high-moderate voltage generation of neutrons and protons. Such systems and methods find use for the commercial-scale generation of neutrons and protons for a wide variety of research, medical, security, and industrial processes.

Abstract: A circuit includes a set of multiple bit generating cells. One or more adjustable characterization circuits are coupled to inputs to the bit generating cells to affect the outputs of the bit generating cells. Based on the effect of the characterization circuit(s) on the outputs of the bit generating cells, a subset less than all of the bit generating cells is selected.

Abstract: Embodiments of the present disclosure relate to application partitioning for locality in a stacked memory system. In an embodiment, one or more memory dies are stacked on the processor die. The processor die includes multiple processing tiles and each memory die includes multiple memory tiles. Vertically aligned memory tiles are directly coupled to and comprise the local memory block for a corresponding processing tile. An application program that operates on dense multi-dimensional arrays (matrices) may partition the dense arrays into sub-arrays associated with program tiles. Each program tile is executed by a processing tile using the processing tile's local memory block to process the associated sub-array. Data associated with each sub-array is stored in a local memory block and the processing tile corresponding to the local memory block executes the program tile to process the sub-array data.

Abstract: A hierarchical network enables access for a stacked memory system including or more memory dies that each include multiple memory tiles. The processor die includes multiple processing tiles that are stacked with the one or more memory die. The memory tiles that are vertically aligned with a processing tile are directly coupled to the processing tile and comprise the local memory block for the processing tile. The hierarchical network provides access paths for each processing tile to access the processing tile’s local memory block, the local memory block coupled to a different processing tile within the same processing die, memory tiles in a different die stack, and memory tiles in a different device. The ratio of memory bandwidth (byte) to floating-point operation (B:F) may improve 50x for accessing the local memory block compared with conventional memory. Additionally, the energy consumed to transfer each bit may be reduced by 10x.

Abstract: A mapper within a single-level memory system may facilitate memory localization to reduce the energy and latency of memory accesses within the single-level memory system. The mapper may translate a memory request received from a processor for implementation at a data storage entity, where the translating identifies a data storage entity and a starting location within the data storage entity where the data associated with the memory request is located. This data storage entity may be co-located with the processor that sent the request, which may enable the localization of memory and significantly improve the performance of memory usage by reducing an energy of data access and increasing data bandwidth.

Abstract: A clutch assembly or module having multiple one-way clutches, each clutch operates independently of the others to control torque transmission to and from a common or shared notch plate. The assembly or module also controls rotation, including the direction thereof, of the common or shared notch plate. Depending upon the position of each one-way clutch, multiple modes of torque transfer and common or shared notch plate rotation can be achieved.

Abstract: Embodiments of the present disclosure relate to memory stacked on processor for high bandwidth. Systems and methods are disclosed for providing a one-level memory for a processing system by stacking bulk memory on a processor die. In an embodiment, one or more memory dies are stacked on the processor die. The processor die includes multiple processing tiles, where each tile includes a processing unit, mapper, and tile network. Each memory die includes multiple memory tiles. The processing tile is coupled to each memory tile that is above or below the processing tile. The vertically aligned memory tiles comprise the local memory block for the processing tile. The ratio of memory bandwidth (byte) to floating-point operation (B:F) may improve 50× for accessing the local memory block compared with conventional memory. Additionally, the energy consumed to transfer each bit may be reduced by 10×.

Abstract: A surveillance system for detecting and/or characterizing movement of a monitored infrastructure. An improved compromise between tight zone surveillance and number of false alarms is provided by an improved control of a 3D surveillance device. An input functionality is provided for a user to define a 3D subzone within a 3D environment model. A change functionality allows the user to generate a redefined subzone by dragging one of the corner points of the 3D subzone to a different position within a 3D visualization of the 3D environment model, whereby the shape of the 3D subzone is distorted. The input functionality and the change functionality are used to provide to the 3D surveillance device spatial parameters associated with the redefined subzone and the 3D surveillance device is caused to generate an action in case a movement within the redefined subzone is detected by means of the 3D measurement data.

Abstract: A monitoring system for locating and classifying an event in a monitoring area by a computation unit including a visual 3D capturing unit providing geometric 3D information and an acoustic capturing unit providing an acoustic information of the monitoring area. An event detector is configured with an acoustic channel and a visual channel to detect the event. The acoustic channel is configured to detect the event as a sound event in the acoustic information and to determine a localization of the sound. The visual channel is configured to detect the event as a visual event in the geometric 3D information and to derive a localization of the visual event. The event detector provides detected events with a region of interest for detected event, which is analyzed in order to assign the detected event a class within a plurality of event classes.

Abstract: Systems and methods for producing printed goods from textile material to address shortcoming of existing approaches for article production. According to the systems and methods described herein, the harvested and woven cotton may be shipped directly to garment decorators who may perform all remaining steps to provide customers with finished goods. As such, the systems and methods herein may eliminate the steps of the blank goods trade and current manufacturing processes.

Abstract: A circuit includes a set of multiple bit generating cells. One or more adjustable characterization circuits are coupled to inputs to the bit generating cells to affect the outputs of the bit generating cells. Based on the effect of the characterization circuit(s) on the outputs of the bit generating cells, a subset less than all of the bit generating cells is selected.

Abstract: A circuit includes a set of multiple bit generating cells. One or more adjustable current sources is coupled to introduce perturbations into outputs of the bit generating cells. Based on the perturbations, the outputs of a subset less than all of the bit generating cells are selected, and applied as a control.

Abstract: A circuit includes a set of multiple bit generating cells. One or more adjustable current sources is coupled to introduce perturbations into outputs of the bit generating cells. Based on the perturbations, the outputs of a subset less than all of the bit generating cells are selected, and applied as a control.

Abstract: A clutch assembly includes a hub, a linear actuator, and a bearing assembly. The hub is rotatable about a rotational axis. The linear actuator has a translator mounted concentrically over the hub. The bearing assembly is at an interface between the translator and the hub. The bearing assembly permits transmission of torque between the translator and the hub while allowing for axial movement of the translator in a direction along the rotational axis relative to the hub. The bearing assembly includes a rolling element(s) (e.g., ball bearing, ball, roller, needle). The bearing assembly may further include a (full circumference, or divided segment) cage which entraps the rolling element(s). The clutch assembly may further include a coupling member supported for rotation about the rotational axis. The hub, with the translator concentrically mounted thereon, is mounted concentrically over a portion of the coupling member.

Abstract: A test manager and media interface (TMMI) may manage testing procedures associated with a test such as a product test, capture media and sensor data associated with the test, and generate a synchronized multimedia presentation based on the captured media and sensor data. A TMMI include: a test environment having: a test applicator for applying a test stimulus to an item under test; a sensor that measures at least one test attribute; and a media capture element that captures media including video of the item under test. The TMMI may include a media interface that generates a graphical user interface including at least a portion of the media captured by the media capture element and the at least one attribute.

Abstract: The disclosure provides an improved transimpedance amplifier (TIA) that can operate at a higher bandwidth and lower noise compared to conventional TIAs. The TIA employs a data path with both feedback impedance and feedback capacitance for improved performance. The feedback impedance includes at least two resistors in series and at least one shunt capacitor, coupled between the at least two resistors, that helps to extend the circuit bandwidth and improve SNR at the same time. The capacitance value of the shunt capacitor can be selected based on both the bandwidth and noise. In one example, the TIA includes: (1) a biasing path, and (2) a data path, coupled to the biasing path, including multiple inverter stages and at least one feedback capacitance coupled across an even number of the multiple inverter stages. An optical receiver and a circuit having the TIA are also disclosed.

Abstract: A monitoring system for locating and classifying an event in a monitoring area by a computation unit including a visual 3D capturing unit providing geometric 3D information and an acoustic capturing unit providing an acoustic information of the monitoring area. An event detector is configured with an acoustic channel and a visual channel to detect the event. The acoustic channel is configured to detect the event as a sound event in the acoustic information and to determine a localization of the sound. The visual channel is configured to detect the event as a visual event in the geometric 3D information and to derive a localization of the visual event. The event detector provides detected events with a region of interest for detected event, which is analyzed in order to assign the detected event a class within a plurality of event classes.

Abstract: The disclosure provides an improved transimpedance amplifier (TIA) that can operate at a higher bandwidth and lower noise compared to conventional TIAs. The TIA employs a data path with both feedback impedance and feedback capacitance for improved performance. The feedback impedance includes at least two resistors in series and at least one shunt capacitor, coupled between the at least two resistors, that helps to extend the circuit bandwidth and improve SNR at the same time. The capacitance value of the shunt capacitor can be selected based on both the bandwidth and noise. In one example, the TIA includes: (1) a biasing path, and (2) a data path, coupled to the biasing path, including multiple inverter stages and at least one feedback capacitance coupled across an even number of the multiple inverter stages. An optical receiver and a circuit having the TIA are also disclosed.