Abstract: A random number generator circuit includes a noise source capable of providing a noise signal that varies randomly; and a circuit for extracting the noise signal including an edge detector configured to produce from the noise signal an analogue signal including voltage pulses, each voltage pulse corresponding to a rising or falling edge of the noise signal, and an analogue-to-digital converter configured to generate a random bit sequence from the analogue signal.

Abstract: A memory circuit includes a plurality of memory cells, each memory cell including a resistive memory element and a selection transistor of the FDSOI type connected in series with the resistive memory element. The selection transistor includes a channel region, a buried insulating layer, a back gate separated from the channel region by the buried insulating layer. The memory circuit further includes a circuit for biasing the back gate of the selection transistors, the biasing circuit being configured to apply a forward back-bias to the selection transistor of at least one memory cell during a programming or initialisation operation of the at least one memory cell.

Abstract: The present method of providing element a random for a cryptographic algorithm is implemented by an electronic calculator comprising a core and a set of memory/memories, the set of memory/memories including a reference memory having an intrinsic randomness in a predefined state of generating randoms. The method comprises: reading a reference message in a first memory zone, the first memory zone being included in the reference memory, the reading step being performed in the state of generating random elements of the reference memory; writing the reference message in a second memory zone, distinct from the first memory zone, the second memory zone being included in the set of memory/memories; subsequent reading of the reference message in the second memory zone, the reference message read in the second memory zone forming the random element for the cryptographic algorithm.

Abstract: A memory circuit includes a plurality of memory cells, each memory cell including a resistive memory element and a selection transistor of the FDSOI type connected in series with the resistive memory element. The selection transistor includes a channel region, a buried insulating layer, a back gate separated from the channel region by the buried insulating layer. The memory circuit further includes a circuit for biasing the back gate of the selection transistors, the biasing circuit being configured to apply a forward back-bias to the selection transistor of at least one memory cell during a programming or initialisation operation of the at least one memory cell.

Abstract: A method for producing optoelectronic devices, including the following successive steps: providing a substrate having a first face; on the first face, forming sets of light-emitting diodes including wire-like, conical or frustoconical semiconductor elements; covering all of the first face with a layer encapsulating the light-emitting diodes; forming a conductive element that is insulated from the substrate and extends through the substrate from the second face to at least the first face; reducing the thickness of the substrate; and cutting the resulting structure in order to separate each set of light-emitting diodes.

Abstract: A random number generator circuit includes a noise source capable of providing a noise signal that varies randomly; and a circuit for extracting the noise signal including an edge detector configured to produce from the noise signal an analogue signal including voltage pulses, each voltage pulse corresponding to a rising or falling edge of the noise signal, and an analogue-to-digital converter configured to generate a random bit sequence from the analogue signal.

Abstract: An optoelectronic device including a semiconductor substrate that is optionally doped with a first type of conductivity; a first semiconductor region that is electrically connected to the substrate, doped with the first type of conductivity or a second opposite type of conductivity and more strongly doped than the substrate; a first set of first light-emitting diodes resting on the first semiconductor region, the first light-emitting diodes comprising wire-like, conical or frustoconical semiconductor elements; and a conductive portion in contact with the first semiconductor region.

Abstract: An optoelectronic device including a semiconductor substrate that is optionally doped with a first type of conductivity; a first semiconductor region that is electrically connected to the substrate, doped with the first type of conductivity or a second opposite type of conductivity and more strongly doped than the substrate; a first set of first light-emitting diodes resting on the first semiconductor region, the first light-emitting diodes comprising wire-like, conical or frustoconical semiconductor elements; and a conductive portion in contact with the first semiconductor region.

Abstract: A method for producing optoelectronic devices, including the following successive steps: providing a substrate having a first face; on the first face, forming sets of light-emitting diodes including wire-like, conical or frustoconical semiconductor elements; covering all of the first face with a layer encapsulating the light-emitting diodes; forming a conductive element that is insulated from the substrate and extends through the substrate from the second face to at least the first face; reducing the thickness of the substrate; and cutting the resulting structure in order to separate each set of light-emitting diodes.

Abstract: An electroluminescent device comprises a structure comprising a set of nanowires on the surface of a substrate, comprising: a first series of primary so-called emission nanowires (NTie) comprising nanowires connected to first electrical contacts and capable of emitting light under the action of a forward first voltage from a forward voltage or current source; a second series of secondary detection nanowires (NTid) adjacent to the primary nanowires, connected to second electrical contacts and capable of generating a photocurrent under the action of an ambient light and/or of a portion of the light emitted by some of the primary nanowires, under the control of a second reverse voltage, from a voltage or current source; means for controlling the forward voltage as a function of the photocurrent. A method for controlling the luminance of an electroluminescent device is provided.

Abstract: A method for reading an electronic memory device including N memory cells Ci with 1?i?N and N?2, each cell Ci having a resistance Ri, the method including for each cell Ci, determining a set Ei of resistance values capable of being associated with the resistance Ri of the cell Ci; for each combination of N variables Vi, each variable Vi taking successively each resistance value among the predetermined set Ei, applying a mathematical function to the combination to obtain a resulting resistance value; for each combination of N variables Vi, associating a logic state of the electronic memory device with the resulting resistance value obtained previously, according to a comparison of the resulting resistance value with a same threshold resistance value; associating a resistance value with each resistance Ri to obtain a particular combination of N variables Vi; determining the logic state of the electronic memory device.

Abstract: A method for reading an electronic memory device including N memory cells Ci with 1?i?N and N?2, each cell Ci having a resistance Ri, the method including for each cell Ci, determining a set Ei of resistance values capable of being associated with the resistance Ri of the cell Ci; for each combination of N variables Vi, each variable Vi taking successively each resistance value among the predetermined set Ei, applying a mathematical function to the combination to obtain a resulting resistance value; for each combination of N variables Vi, associating a logic state of the electronic memory device with the resulting resistance value obtained previously, according to a comparison of the resulting resistance value with a same threshold resistance value; associating a resistance value with each resistance Ri to obtain a particular combination of N variables Vi; determining the logic state of the electronic memory device.

Abstract: An electroluminescent device comprises a structure comprising a set of nanowires on the surface of a substrate, comprising: a first series of primary so-called emission nanowires (NTie) comprising nanowires connected to first electrical contacts and capable of emitting light under the action of a forward first voltage from a forward voltage or current source; a second series of secondary detection nanowires (NTid) adjacent to the primary nanowires, connected to second electrical contacts and capable of generating a photocurrent under the action of an ambient light and/or of a portion of the light emitted by some of the primary nanowires, under the control of a second reverse voltage, from a voltage or current source; means for controlling the forward voltage as a function of the photocurrent. A method for controlling the luminance of an electroluminescent device is provided.

Abstract: A process for fabricating an array of nanowires on the surface of a substrate, the nanowires comprising a portion capable of emitting radiation under action of an electrical or optical control and at least partially connected to one another electrically via a conductive upper layer, comprises steps allowing a subset of defective nanowires to be identified among active nanowires, the steps comprising: producing a layer of negative photoresist sensitive to the emission wavelength, covering the array of the nanowires; activating the array of the nanowires under electrical control or optical control so the active nanowires emit the radiation, the radiation decreasing the solubility of the negative resist; developing the resist level with the defective nanowires, leaving zones made less soluble and encircling the active nanowires; and removing the conductive layer above the defective nanowires. A process for fabricating one or more light-emitting diodes using the process is provided.

Abstract: A process for fabricating an array of nanowires on the surface of a substrate, the nanowires comprising a portion capable of emitting radiation under action of an electrical or optical control and at least partially connected to one another electrically via a conductive upper layer, comprises steps allowing a subset of defective nanowires to be identified among active nanowires, the steps comprising: producing a layer of negative photoresist sensitive to the emission wavelength, covering the array of the nanowires; activating the array of the nanowires under electrical control or optical control so the active nanowires emit the radiation, the radiation decreasing the solubility of the negative resist; developing the resist level with the defective nanowires, leaving zones made less soluble and encircling the active nanowires; and removing the conductive layer above the defective nanowires. A process for fabricating one or more light-emitting diodes using the process is provided.