Abstract: A calibration circuit for calibrating harmonics in a mixer. The calibration circuit includes an RF signal path configured to receive an RF signal corresponding to an output of the mixer, selectively receive a test signal injected into the RF signal path, and provide feedback to the mixer according to the RF signal and/or the test signal. The test signal corresponds to a selected harmonic of the harmonics in the mixer. A measurement circuit is configured to detect, in the output of the mixer, the test signal injected into the RF signal path. A calibration module is configured to receive a feedback signal indicative of the test signal detected in the output of the mixer and, based on the feedback signal indicative of the test signal detected in the output of the mixer, adjust a duty cycle associated with the mixer to calibrate the selected harmonic.

Abstract: A system includes a radio frequency (RF) signal path configured to receive an input signal that includes at least one of a test signal and an RF signal. A local oscillator (LO) signal path is configured to supply a LO signal. A mixer includes a first input in communication with the RF signal path and a second input in communication with the LO signal path. A calibration control module is configured to receive an output of the mixer in response to the test signal and to adjust an effective duty cycle of the LO signal in the LO signal path based on the output of the mixer.

Abstract: A MOS transistor capable of withstanding significant currents, having doped areas corresponding to first and second main terminals of elementary MOS transistors and having, in top view, the shape of parallel strips separated by gate regions; first conductive elements which do not extend on the doped areas corresponding to the second main terminals and dividing into first fingers extending at least partly on the doped areas corresponding to the first main terminals and connected thereto; and second conductive elements which do not extend on the doped areas corresponding to the first main terminals and divide into second fingers extending at least partly on the doped areas corresponding to the second main terminals and connected thereto, the second fingers being at least partly intercalated with the first fingers.

Abstract: A MOS transistor capable of withstanding significant currents, having doped areas corresponding to first and second main terminals of elementary MOS transistors and having, in top view, the shape of parallel strips separated by gate regions; first conductive elements which do not extend on the doped areas corresponding to the second main terminals and dividing into first fingers extending at least partly on the doped areas corresponding to the first main terminals and connected thereto; and second conductive elements which do not extend on the doped areas corresponding to the first main terminals and divide into second fingers extending at least partly on the doped areas corresponding to the second main terminals and connected thereto, the second fingers being at least partly intercalated with the first fingers.