Abstract: A diffusion barrier layer in an integrated circuit is located to inhibit undesired diffusion of chemical species from local interconnects into layered superlattice material in a thin film memory capacitor. The diffusion barrier layer comprises iridium oxide. The thin film of layered superlattice material is ferroelectric or nonferroelectric, high-dielectric constant material. Preferably, the thin film comprises ferroelectric layered superlattice material. The diffusion barrier layer is located between a local interconnect and the memory capacitor. Preferably, the diffusion barrier layer is in direct contact with the local interconnect. The iridium-oxide diffusion barrier is effective for preventing diffusion of metals, silicon and other chemical species.

Abstract: A nonvolatile nondestructible read-out ferroelectric FET memory comprising a semiconductor substrate, a ferroelectric functional gradient material (“FGM”) thin film, and a gate electrode. In one basic embodiment, the ferroelectric FGM thin film contains a ferroelectric compound and a dielectric compound. The dielectric compound has a lower dielectric constant than the ferroelectric compound. There is a concentration gradient of the ferroelectric compound in the thin film. In a second basic embodiment, the FGM thin film is a functional gradient ferroelectric (“FGF”), in which compositional gradients of ferroelectric compounds result in unconventional hysteresis behavior. The unconventional hysteresis behavior of FGF thin films is related to an enlarged memory window in ferroelectric FET memories. FGM thin films are preferably formed using a liquid source MOD methods, preferably a multisource CVD method.

Abstract: A ferroelectric device includes a ferroelectric layer and an electrode. The ferroelectric material is made of a perovskite or a layered superlattice material. A superlattice generator metal oxide is deposited as a capping layer between said ferroelectric layer and said electrode to improve the residual polarization capacity of the ferroelectric layer.

Abstract: A high dielectric constant insulator including a thin film of a metal oxide selected from the group consisting of tungsten-bronze-type oxides, pyrochlore-type oxides, and combinations of Bi2O3 with an oxide selected from the group consisting of perovskites and pyrochlore-type oxides. An embodiment contains metal oxides represented by the general stoichiometric formulas AB2O6, A2B2O7 and A2Bi2B2O10, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La; and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb. Preferably, the metal oxides are (BaxSr1−x)(TayNb1−y)2O6, where 0≦x≦1.0 and 0≦y≦1.0; (BaxSr1−x)2(TayNb1−y)2O7, where 0≦x≦1.0 and 0≦y≦1.0; and (BaxSr1−x)2Bi2(TayNby−1)2O10, where 0≦x≦1.0 and 0≦y≦1.0. Thin films according to the invention have a relative dielectric constant ≧40, and preferably about 100.

Abstract: A hydrogen barrier layer is formed above a ferroelectric thin film in an integrated circuit. The hydrogen barrier layer is directly over a protected segment of the ferroelectric thin film, while a sacrificial segment of the ferroelectric thin film extends laterally beyond the edges of the hydrogen barrier layer. The sacrificial segment absorbs hydrogen so that it cannot diffuse laterally into the protected segment of the ferroelectric thin film. After it absorbs hydrogen, the sacrificial segment is etched away to allow electrical connection to circuit layers below it. The ferroelectric thin film preferably comprises a layered superlattice compound. Excess bismuth or niobium added to the standard precursor solution of a strontium bismuth tantalum niobate compound helps to reduce hydrogen degradation of the ferroelectric properties.

Abstract: A mass flow controller controls the delivery of a precursor to a mist generator. The precursor is misted utilizing a venturi in which a combination of oxygen and nitrogen gas is charged by a corona wire and passes over a precursor-filled throat. The mist is refined using a particle inertial separator, electrically filtered so that it comprises predominantly negative ions, passes into a velocity reduction chamber, and then flows into a deposition chamber through inlet ports in an inlet plate that is both a partition between the chambers and a grounded electrode. The inlet plate is located above and substantially parallel to the plane of the substrate on which the mist is to be deposited. The substrate is positively charged to a voltage of about 5000 volts. There are 440 inlet ports per square inch in an 39 square inch inlet port area of the inlet plate directly above the substrate. The inlet port area is approximately equal to the substrate area.

Abstract: A method for forming an interface insulator layer in a ferroelectric FET memory, in which a liquid precursor is applied to a semiconductor substrate. Preferably, the liquid precursor is an enhanced metalorganic decomposition (“EMOD”) precursor, applied using a liquid-source misted deposition technique. Preferably, the EMOD precursor solution applied to the substrate contains metal ethylhexanoates containing metal moieties in relative molar proportions for forming an interface insulator layer containing ZrO2, CeO2, Y2O3 or (Ce1-xZrx)O2, wherein 0≦x≦1.

Abstract: A coating of liquid precursor containing a metal is applied to a first electrode, baked on a hot plate in oxygen ambient at a temperature not exceeding 300° C. for five minutes, then RTP annealed at 675° C. for 30 seconds. The coating is then annealed in oxygen or nitrogen ambient at 700° C. for one hour to form a thin film of layered superlattice material with a thickness not exceeding 100 nm. A second electrode is applied to form a capacitor, and a second anneal is performed in oxygen or nitrogen ambient at a temperature not exceeding 700° C. If the material is strontium bismuth tantalate, the precursor contains u mole-equivalents of strontium, v mole-equivalents of bismuth, and w mole-equivalents of tantalum, where 0.8≦u≦1.0, 2.0≦v≦2.3, and 1.9≦w≦2.1.

Abstract: A nonvolatile nondestructible read-out ferroelectric FET memory comprising a semiconductor substrate, a ferroelectric functional gradient material (“FGM”) thin film, and a gate electrode. In one basic embodiment, the ferroelectric FGM thin film contains a ferroelectric compound and a dielectric compound. The dielectric compound has a lower dielectric constant than the ferroelectric compound. There is a concentration gradient of the ferroelectric compound in the thin film. In a second basic embodiment, the FGM thin film is a functional gradient ferroelectric (“FGF”), in which compositional gradients of ferroelectric compounds result in unconventional hysteresis behavior. The unconventional hysteresis behavior of FGF thin films is elated to an enlarged memory window in ferroelectric FET memories. FGM thin films are preferably formed using a liquid source MOD methods, preferably a multisource CVD method.

Abstract: A hydrogen barrier layer is formed above a ferroelectric thin film in an integrated circuit. The hydrogen barrier layer is directly over a protected segment of the ferroelectric thin film, while a sacrificial segment of the ferroelectric thin film extends laterally beyond the edges of the hydrogen barrier layer. The sacrificial segment absorbs hydrogen so that it cannot diffuse laterally into the protected segment of the ferroelectric thin film. After it absorbs hydrogen, the sacrificial segment is etched away to allow electrical connection to circuit layers below it. The ferroelectric thin film preferably comprises a layered superlattice compound. Excess bismuth or niobium added to the standard precursor solution of a strontium bismuth tantalum niobate compound helps to reduce hydrogen degradation of the ferroelectric properties.

Abstract: A protective layer in a ferroelectric integrated circuit contains small amounts of oxygen to protect ferroelectric oxide material against hydrogen degradation during the fabrication process. Typically, the protective layer is a hydrogen diffusion barrier layer formed to cover a thin film of ferroelectric oxide material. In one method, a small amount of oxygen is included in the sputter atmosphere during deposition of a hydrogen diffusion barrier or a metallized wiring layer. The oxygen forms oxides that inhibit diffusion of hydrogen towards the ferroelectric oxide material. The oxygen forms a concentration gradient so that the oxygen concentration in the interior of the protective layer is zero, and the oxygen concentration near the surfaces of the layer is about two weight percent.

Abstract: In a ferroelectric integrated circuit, a hydrogen barrier layer comprising titanium or titanium nitride or both is formed over a metal oxide element to protect it from hydrogen degradation. After hydrogen annealing and other process steps causing hydrogenating or reducing conditions, the hydrogen barrier layer is removed in a two-step etching process. The first etch step is a dry etch, preferably a standard ion-mill etching process, which rapidly removes most of the hydrogen barrier layer. The second step is a wet, chemical etch, preferably using a solution containing NH4OH, H2O2, and H2O, which selectively removes remnants of the hydrogen barrier layer from the circuit by oxidizing a chemical element of the barrier layer. The metal oxide material preferably comprises a layered superlattice compound.

Abstract: A thin film of ferroelectric layered superlattice material in a flat panel display device is energized to selectively influence the display image. In one embodiment, a voltage pulse causes the layered superlattice material to emit electrons that impinge upon a phosphor, causing the phosphor to emit light. In another embodiment, an electric potential creates a remanent polarization in the layered superlattice material, which exerts an electric field in liquid crystal layer, thereby influencing the transmissivity of light through the liquid crystal. The layered superlattice material is a metal oxide formed using an inventive liquid precursor containing an alkoxycarboxylate. The thin film thickness is preferably in the range 50-140 nm, so that polarizabilty and transparency of the thin film is enhanced. A display element may comprise a varistor device to prevent cross-talk between pixels and to enable sudden polarization switching. A functional gradient in the ferroelectric thin film enhances electron emission.

Abstract: A liquid precursor solution for use according to a method of manufacturing metal oxide electronic components includes a polyoxyalkylated metal complex dispersed in an alkane solvent. The alkane solvent is preferably n-octane.

Abstract: Metal organic precursor compounds are dissolved in an organic solvent to form a nonaqueous liquid precursor. The liquid precursor is applied to the inner envelope surface of a fluorescent lamp and heated to form a metal oxide thin film layer. The metal oxide thin film layer may be a conductor, a protective layer or provide other functions. The films have a thickness of from 20 nm to 500 nm. A conductive layer comprising tin-antimony oxide with niobium dopant may be fabricated to have a differential resistivity profile by selecting a combination of precursor composition and annealing temperatures.

Abstract: An integrated circuit is formed that contains a ferroelectric element comprising metal oxide material containing at least two metals. An oxygen-recovery anneal is conducted in ambient oxygen at a temperature range from 300.degree. to 1000.degree. C. for a time period from 20 minutes to 2 hours. The oxygen-recovery anneal reverses the effects of hydrogen degradation and restores ferroelectric properties. The oxygen-recovery anneal is more effective as the annealing temperature and annealing time increase. Preferably the metal oxide element comprises a layered superlattice compound. Hydrogen degradation of the ferroelectric properties is minimized when the layered superlattice compound comprises strontium bismuth tantalum niobate and the niobium/tantalum mole ratio in the precursor is about 0.4.

Abstract: A ferroelectric field effect transistor memory cell includes a thin film varistor located between the gate electrode and the ferroelectric layer. The varistor protects the ferroelectric layer from disturb voltage pulses arising from memory read, write and sense operations. A second electrode is located between the thin film varistor and the ferroelectric layer. The thin film ferroelectric is positioned over the channel of a transistor to operate as a ferroelectric gate. For voltages at which disturb voltages are likely to occur, the thin film varistor has a resistance obeying a formula R.sub.d >10.times.1/(2.pi.fC.sub.F), where R.sub.d is resistivity of the thin film varistor, f is an operating frequency of said memory, and C.sub.F is the capacitance of the ferroelectric layer. For voltages at or near the read and write voltage of the memory, the thin film varistor has a resistance obeying a formula R.sub.d <0.1.times.1/(2.pi.fC.sub.F).

Abstract: A substrate is located within a deposition chamber, the substrate defining a substrate plane. A liquid precursor is misted by ultrasonic or venturi apparatus, to produce a colloidal mist. The mist is generated, allowed to settle in a buffer chamber, filtered through a system up to 0.01 micron, and flowed into the deposition chamber between the substrate and barrier plate to deposit a liquid layer on the substrate. The liquid is dried to form a thin film of solid material on the substrate, which is then incorporated into an electrical component of an integrated circuit.

Abstract: A ferroelectric non-volatile memory in which each memory cell consists of a metal-ferroelectric-metal ("MFM") capacitor and a FET on a semiconductor substrate. The MFM and the FET are separated by an interlayer dielectric layer. A local interconnect connects the gate electrode of the FET to the bottom electrode of the MFM capacitor. Preferably, the MFM is located directly above the gate electrode, and the local interconnect is a conductive plug in a filled via. Preferably, the ferroelectric thin film of the MFM comprises a layered superlattice material. Preferably, a dielectric metal oxide insulator layer is located between the gate electrode and the semiconductor substrate.

Abstract: A liquid precursor containing thallium is applied to a first electrode, RTP baked at a temperature lower than 725.degree. C., and annealed at the same temperature for a time period from one to five hours to yield a ferroelectric layered superlattice material. A second electrode is formed to form a capacitor, and a second anneal is performed at a temperature lower than 725.degree. C. If the material is strontium bismuth thallium tantalate, the precursor contains (m-1) mole-equivalents of strontium for each of (2.2-x) mole-equivalents of bismuth, x mole-equivalents of thallium, and m mole-equivalents of tantalum, where m=2 and 0.0<x.ltoreq.2.2.