Patents by Inventor Carlos Alba
Carlos Alba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240052589Abstract: A method for fabricating a retaining wall configured to extend into a ground comprising the steps of providing at least a first longitudinal support having a receiving part and extending along a first longitudinal direction; placing the first longitudinal support transversely to the ground; providing at least a first module comprising a longitudinal element and a first wing; positioning the first module parallel to the first longitudinal support; connecting the first module to the first longitudinal support, so that the first wing of the first module is slidably engaged with the receiving part of the first longitudinal support; then moving said first module in translation along the first longitudinal direction, and sinking said first module into the ground and then the first longitudinal support into the ground.Type: ApplicationFiled: December 13, 2021Publication date: February 15, 2024Inventors: Juan Fernando URIBE, Robert ROCHA, Juan Carlos ALBA, César AMAYA
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Publication number: 20210079179Abstract: A film capacitor is disclosed. In an embodiment a film capacitor includes a film comprising a blend of polypropylene and cyclo-olefin copolymer, wherein the blend includes an amount of at least two thirds by weight of polypropylene, and wherein the cyclo-olefin copolymer includes ethylene in a range of 23 weight % to 27 weight % inclusive and norbornene in a range of 73 weight % to 77 weight % inclusive.Type: ApplicationFiled: May 15, 2018Publication date: March 18, 2021Applicants: TDK Electronics AG, TDK Electronics AGInventors: Carlos Alba, David Pelaez, Lucia Cabo, Anna-Lena Majer
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Patent number: 10301468Abstract: A nylon compound is disclosed having good through plane thermal conductivity and improved physical strength. The compound comprises a combination of nylon, graphite, and long glass fibers. The through plane thermal conductivity of the compound ranges from about 1 W/m·K to about 4 W/m·K, as measured by the C-Therm Test described herein. This nylon compound is also electrically conductive, preferably having a surface resistivity ranging from about 1×103 Ohm/sq to about 1×105 Ohm/sq as measured by IEC 60093.Type: GrantFiled: June 18, 2015Date of Patent: May 28, 2019Assignee: PolyOne CorporationInventors: Renaud Maurer, Carlos Albas Giral, Marc Mezailles
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Publication number: 20170226341Abstract: A nylon compound is disclosed having good through plane thermal conductivity and improved physical strength. The compound comprises a combination of nylon, graphite, and long glass fibers. The through plane thermal conductivity of the compound ranges from about 1 W/m·K to about 4 W/m·K, as measured by the C-Therm Test described herein. This nylon compound is also electrically conductive, preferably having a surface resistivity ranging from about 1×103 Ohm/sq to about 1×105 Ohm/sq as measured by IEC 60093.Type: ApplicationFiled: June 18, 2015Publication date: August 10, 2017Applicant: PolyOne CorporationInventors: Renaud MAURER, Carlos ALBAS GIRAL, Marc MEZAILLES
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Publication number: 20130138927Abstract: A data processing apparatus has an instruction memory system arranged to output an instruction word addressed by an instruction address. An instruction execution unit, processes a plurality of instructions from the instruction word in parallel. A detection unit, detects in which of a plurality of ranges the instruction address lies. The detection unit is coupled to the instruction execution unit and/or the instruction memory system, to control a way in which the instruction execution unit parallelizes processing of the instructions from the instruction word, dependent on a detected range. In an embodiment the instruction execution unit and/or the instruction memory system adjusts a width of the instruction word that determines a number of instructions from the instruction word that is processed in parallel, dependent on the detected range.Type: ApplicationFiled: January 28, 2013Publication date: May 30, 2013Applicant: Nytell Software LLCInventors: Ramanathan Sethuraman, Balakrishnan Srinivasan, Carlos Alba Pinto, Harm Peters, Rafael Peset LLopis
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Publication number: 20060212686Abstract: An instruction processing device has a of pipe-line stage with a functional unit for executing a command from an instruction. A first register unit is coupled to the functional unit for storing a result of execution of the command when the command has reached a first one of the pipeline stages, and for supplying bypass operand data to the functional unit. A register file is coupled to the functional unit for storing the result when the command has reached a second one of the pipeline stages, downstream from the first one of the pipeline stages, and for supplying operand data to the functional unit. A disable circuit is coupled to control of the instructions.Type: ApplicationFiled: March 17, 2004Publication date: September 21, 2006Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Balakrishnan Srinivasan, Ramanathan Sethuraman, Carlos Alba Pinto
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Publication number: 20060156004Abstract: A data processing apparatus has an instruction memory system arranged to output an instruction word, capable of containing a plurality of instructions, respective instruction words being output in response to respective instruction addresses. An instruction execution unit contains a plurality of functional units, each capable of executing a respective instruction from the instruction word in parallel with execution of other instructions from the instruction word by other ones of the functional units. A power saving circuit is provided to switch a selectable subset of the functional units and/or parts of the instruction memory to a power saving state, while other functional units and parts of the instruction memory continue processing instructions in a normal power consuming state. The power saving circuit selects the functional units and/or parts of the instruction memory dependent on program execution.Type: ApplicationFiled: September 17, 2003Publication date: July 13, 2006Inventors: Carlos Alba Pinto, Ramanathan Sethuraman, Balakrishnan Srinivasan, Harm Johannes Peters, Rafael Peset Llopis
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Publication number: 20060095715Abstract: The invention relates to a very long instruction word (VLIW) processor comprising a plurality of functional units (110, 130, 135), each for executing an operation, and a VLIW controller (100) connected to each of said functional units (110, 130, 135) and adapted to controlling said functional units (110, 130, 135). The VLIW processor comprises at least one indication means (140) associated with one of said functional units (135) and adapted to registering and indicating to the VLIW controller (100) whether said one functional unit (135) is idle or operating.Type: ApplicationFiled: December 3, 2003Publication date: May 4, 2006Applicant: Koninklijke Philips Electronics N.V.Inventors: Balakrishnan Srinivasan, Ramanathan Sethuraman, Carlos Alba Pinto, Harm Johannes Peters
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Publication number: 20060004986Abstract: A data processing apparatus has an instruction memory system arranged to output an instruction word addressed by an instruction address. An instruction execution unit, processes a plurality of instructions from the instruction word in parallel. A detection unit, detects in which of a plurality of ranges the instruction address lies. The detection unit is coupled to the instruction execution unit and/or the instruction memory system, to control a way in which the instruction execution unit parallelizes processing of the instructions from the instruction word, dependent on a detected range. In an embodiment the instruction execution unit and/or the instruction memory system adjusts a width of the instruction word that determines a number of instructions from the instruction word that is processed in parallel, dependent on the detected range.Type: ApplicationFiled: October 1, 2003Publication date: January 5, 2006Applicant: Koninklijke Philips Electronics N.V.Inventors: Ramanathan Sethuraman, Balakrishnan Srinivasan, Carlos Alba Pinto, Harm Johannes Peters, Rafael Peset Llopis
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Publication number: 20050273569Abstract: A program of instruction words is executed with a VLIW data processing apparatus. The apparatus comprises a plurality of functional units capable of executing a plurality of instructions from each instruction word in parallel. The instructions from each of at least some of the instruction words are fetched from respective memory units in parallel, addressed with an instruction address that is common for the functional units. Translation of the instruction address into a physical address can be modified for one or more particular ones of the memory units. Modification is controlled by modification update instructions in the program. Thus, it can be selected dependent on program execution which instructions from the memory units will be combined into the instruction word in response to the instruction address.Type: ApplicationFiled: September 17, 2003Publication date: December 8, 2005Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Carlos Alba Pinto, Ramanathan Sethuraman, Balakrishnan Srinivasan, harm Johannes Peters, Rafael Peset Llopis