Patents by Inventor Carlos Alfonso Tokunaga

Carlos Alfonso Tokunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8346832
    Abstract: A circuit for generating a random output value is disclosed that comprises: a bistable circuit having two stable states in which a 0 or a 1 is output and having a balanced metastable state in which a floating value between 0 and 1 is output, said bistable circuit resolving from said metastable state to one of said stable states on being switched on, said state depending on a voltage level at a port on said bistable circuit; a voltage level control circuit for controlling a voltage level at said port on said bistable circuit; a time measuring circuit for measuring a switching time taken for said bistable circuit to switch from said metastable state to one of said stable states following switch on; and control logic for controlling said time measuring circuit, said voltage level control circuit and a switching off and on of said bistable circuit, said control logic being adapted to perform a following sequence: control said voltage level control circuit to set a predetermined voltage level at said port on said
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: January 1, 2013
    Assignee: The Regents of the University of Michigan
    Inventors: Trevor Nigel Mudge, David Theodore Blaauw, Carlos Alfonso Tokunaga
  • Patent number: 7880339
    Abstract: An isolation circuitry and method are provided for coupling between a power supply and processing circuitry in order to provide power to the processing circuitry whilst hiding a power consumption characteristic of that processing circuitry. The isolation circuitry comprises a plurality of sub-circuits, with each sub-circuit comprising a capacitor, a first switch configured to provide a first connection between the capacitor and the power supply, a second switch configured to provide a second connection between the capacitor and the processing circuitry, and a third switch configured to provide a third connection across the capacitor to partially discharge the capacitor. Control circuitry controls the plurality of sub-circuits, such that within each sub-circuit the first switch, second switch and third switch are placed in an active state in a repeating sequence.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: February 1, 2011
    Assignee: The Regents of the University of Michigan
    Inventors: Carlos Alfonso Tokunaga, David Theodore Blaauw
  • Publication number: 20100194205
    Abstract: An isolation circuitry and method are provided for coupling between a power supply and processing circuitry in order to provide power to the processing circuitry whilst hiding a power consumption characteristic of that processing circuitry. The isolation circuitry comprises a plurality of sub-circuits, with each sub-circuit comprising a capacitor, a first switch configured to provide a first connection between the capacitor and the power supply, a second switch configured to provide a second connection between the capacitor and the processing circuitry, and a third switch configured to provide a third connection across the capacitor to partially discharge the capacitor. Control circuitry controls the plurality of sub-circuits, such that within each sub-circuit the first switch, second switch and third switch are placed in an active state in a repeating sequence.
    Type: Application
    Filed: February 3, 2009
    Publication date: August 5, 2010
    Applicant: The Regents of the University of Michigan
    Inventors: Carlos Alfonso Tokunaga, David Theodore Blaauw
  • Publication number: 20080091755
    Abstract: A circuit for generating a random output value is disclosed that comprises: a bistable circuit having two stable states in which a 0 or a 1 is output and having a balanced metastable state in which a floating value between 0 and 1 is output, said bistable circuit resolving from said metastable state to one of said stable states on being switched on, said state depending on a voltage level at a port on said bistable circuit; a voltage level control circuit for controlling a voltage level at said port on said bistable circuit; a time measuring circuit for measuring a switching time taken for said bistable circuit to switch from said metastable state to one of said stable states following switch on; and control logic for controlling said time measuring circuit, said voltage level control circuit and a switching off and on of said bistable circuit, said control logic being adapted to perform a following sequence: control said voltage level control circuit to set a predetermined voltage level at said port on said
    Type: Application
    Filed: July 19, 2007
    Publication date: April 17, 2008
    Inventors: Trevor Nigel Mudge, David Theodore Blaauw, Carlos Alfonso Tokunaga