Patents by Inventor Carlos Andres Perez Cruz

Carlos Andres Perez Cruz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11791833
    Abstract: A voltage-controlled oscillator analog-to-digital converter (VCO-ADC) includes a first source follower coupled between a first input terminal and a first internal node; a first VCO having an input coupled to a second internal node; a first variable resistor coupled between the first internal node and the second internal node; and a digital signal processing component coupled between an output of the first VCO and a output terminal.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: October 17, 2023
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Ruben Garvi Jimenez-Ortiz, Luis Hernandez-Corporales, Guillermo Alejandro Lopez Fernandez, Carlos Andres Perez Cruz, Andres Quintero Alonso
  • Publication number: 20220286774
    Abstract: A voltage-controlled oscillator analog-to-digital converter (VCO-ADC) includes a first source follower coupled between a first input terminal and a first internal node; a first VCO having an input coupled to a second internal node; a first variable resistor coupled between the first internal node and the second internal node; and a digital signal processing component coupled between an output of the first VCO and a output terminal.
    Type: Application
    Filed: March 8, 2021
    Publication date: September 8, 2022
    Inventors: Ruben Garvi Jimenez-Ortiz, Luis Hernandez-Corporales, Guillermo Alejandro Lopez Fernandez, Carlos Andres Perez Cruz, Andres Quintero Alonso
  • Patent number: 11356112
    Abstract: An analog-to-digital converter includes a voltage-controlled oscillator (VCO) having an input for receiving an analog input signal; a double binary counter having a first input coupled to a first output of the VCO, a second input coupled to a second output of the VCO; a first set of registers coupled to the first output of the double binary counter; a second set of registers coupled to the second output of the double binary counter; sense amplifiers coupled to the outputs of the VCO; and a correction component coupled to the first set of registers, the second set of registers, and the sense amplifiers, wherein the correction component generates a coarse count, a fine count, and combines the coarse count and the fine count to provide a digital output signal representative of the analog input signal.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: June 7, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Andres Quintero Alonso, Luis Hernandez-Corporales, Francois Marie Leger, Carlos Andres Perez Cruz
  • Patent number: 10886930
    Abstract: An analog-to-digital converter includes a ring oscillator having an input for receiving an analog signal, a coarse counter including a maximum length sequence generator having an input coupled to the output of the ring oscillator, a fine counter including a Johnson counter having an input coupled to the output of the ring oscillator, and a difference generator having a first input coupled to the output of the coarse counter, a second input coupled to the output of the fine counter, and an output for providing a digital signal corresponding to the analog signal.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: January 5, 2021
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Cesare Buffa, Luis Hernandez-Corporales, Carlos Andres Perez Cruz, Andres Quintero Alonso, Andreas Wiesbauer
  • Patent number: 10270460
    Abstract: An analog-to-digital converter includes a ring oscillator having an input for receiving an analog signal, a coarse Gray code counter having a first input coupled to a first output of the ring oscillator and a second input for receiving a clock signal, a fine counter having first inputs coupled to secondary outputs of the ring oscillator and a second input for receiving the clock signal, a first difference generator having an input coupled to the output of the coarse counter, a second difference generator having an input coupled to the output of the fine counter, and an adder having a first input coupled to the output of the first difference generator, a second input coupled to the output of the second difference generator, and an output for providing a digital signal corresponding to the analog signal.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: April 23, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Cesare Buffa, Fernando Cardes Garcia, Luis Hernandez-Corporales, Carlos Andres Perez Cruz, Andres Quintero Alonso, Andreas Wiesbauer