Patents by Inventor Carlos Azeredo Leme
Carlos Azeredo Leme has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10416706Abstract: Disclosed is a calibration unit for calibrating an oscillator of a device comprises a counting and comparing unit and a control circuit. The counting and comparing unit is configured to determine a number of periods of a clock signal lying between a starting instance and an ending instance. Therein, the clock signal is generated by the oscillator. The counting and comparing unit is further configured to determine a deviation of the number of periods from a reference number. The control circuit is configured to adjust the oscillator depending on the deviation.Type: GrantFiled: July 11, 2015Date of Patent: September 17, 2019Assignee: Synopsys, Inc.Inventors: Carlos Azeredo Leme, Adam Burns, Dino Toffolon
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Publication number: 20160026209Abstract: Disclosed is a calibration unit for calibrating an oscillator of a device comprises a counting and comparing unit and a control circuit. The counting and comparing unit is configured to determine a number of periods of a clock signal lying between a starting instance and an ending instance. Therein, the clock signal is generated by the oscillator. The counting and comparing unit is further configured to determine a deviation of the number of periods from a reference number. The control circuit is configured to adjust the oscillator depending on the deviation.Type: ApplicationFiled: July 11, 2015Publication date: January 28, 2016Inventors: Carlos Azeredo Leme, Adam Burns, Dino Toffolon
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Patent number: 8731505Abstract: A tuner system for receiving a plurality of frequency bands includes a low noise amplifier coupled with a band selection filter to select a desired band. The tuner system further includes a complex RF filter to produce a complex RF signal from the selected band. The tuner system includes two double-quadrature converters, the first double-quadrature converter frequency down-converts the complex RF signal to a complex baseband signal. The complex baseband signal passes through a baseband filter that contains two identical lowpass filters for obtaining a baseband in-phase (I) signal and a quadrature (Q) signal. The second double-quadrature converter up-converts the baseband I and Q signals to respective IF I and Q signals that are significantly free of the positive third IF harmonic. The third IF-harmonic free I and Q signals are further processed by a complex bandpass filter. The bandpass filter has a programmable frequency center and a programmable bandwidth.Type: GrantFiled: July 17, 2013Date of Patent: May 20, 2014Assignee: Synopsys, Inc.Inventors: Carlos Azeredo Leme, Ricardo Reis
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Patent number: 8600326Abstract: A GPS baseband architecture provides flexibility and power consumption and chip area usage advantages. The GPS baseband architecture includes a first stage having a preamplifier coupled to a low noise amplifier, which is coupled to a mixer. A PLL provides the mixer with a frequency to convert a signal to a higher intermediate (IF) frequency. The output of the mixer is fed to a poly-phase filter. The output of the poly-phase filter is fed to a programmable gain amplifier (PGA), whose output is fed to an analog-to-digital converter (ADC) to produce an output GPS signal. A saturation bit of the ADC is used to control the PGA through a digital amplifier gain control (AGC) circuit.Type: GrantFiled: April 5, 2012Date of Patent: December 3, 2013Assignee: Synopsys, Inc.Inventors: Ricardo Dos Santos Reis, Carlos Azeredo Leme
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Publication number: 20130300938Abstract: A tuner system for receiving a plurality of frequency bands includes a low noise amplifier coupled with a band selection filter to select a desired band. The tuner system further includes a complex RF filter to produce a complex RF signal from the selected band. The tuner system includes two double-quadrature converters, the first double-quadrature converter frequency down-converts the complex RF signal to a complex baseband signal. The complex baseband signal passes through a baseband filter that contains two identical lowpass filters for obtaining a baseband in-phase (I) signal and a quadrature (Q) signal. The second double-quadrature converter up-converts the baseband I and Q signals to respective IF I and Q signals that are significantly free of the positive third IF harmonic. The third IF-harmonic free I and Q signals are further processed by a complex bandpass filter. The bandpass filter has a programmable frequency center and a programmable bandwidth.Type: ApplicationFiled: July 17, 2013Publication date: November 14, 2013Inventors: Carlos Azeredo Leme, Ricardo Reis
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Patent number: 8515371Abstract: A tuner system for receiving a plurality of frequency bands includes a low noise amplifier coupled with a band selection filter to select a desired band. The tuner system further includes a complex RF filter to produce a complex RF signal from the selected band. The tuner system includes two double-quadrature converters, the first double-quadrature converter frequency down-converts the complex RF signal to a complex baseband signal. The complex baseband signal passes through a baseband filter that contains two identical lowpass filters for obtaining a baseband in-phase (I) signal and a quadrature (Q) signal. The second double-quadrature converter up-converts the baseband I and Q signals to respective IF I and Q signals that are significantly free of the positive third IF harmonic. The third IF-harmonic free I and Q signals are further processed by a complex bandpass filter. The bandpass filter has a programmable frequency center and a programmable bandwidth.Type: GrantFiled: October 29, 2009Date of Patent: August 20, 2013Assignee: Synopsys, Inc.Inventors: Carlos Azeredo Leme, Ricardo Reis
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Publication number: 20120194384Abstract: A GPS baseband architecture provides flexibility and power consumption and chip area usage advantages. The GPS baseband architecture includes a first stage having a preamplifier coupled to a low noise amplifier, which is coupled to a mixer. A PLL provides the mixer with a frequency to convert a signal to a higher intermediate (IF) frequency. The output of the mixer is fed to a poly-phase filter. The output of the poly-phase filter is fed to a programmable gain amplifier (PGA), whose output is fed to an analog-to-digital converter (ADC) to produce an output GPS signal. A saturation bit of the ADC is used to control the PGA through a digital amplifier gain control (AGC) circuit.Type: ApplicationFiled: April 5, 2012Publication date: August 2, 2012Applicant: Synopsys, Inc.Inventors: Ricardo dos Santos Reis, Carlos Azeredo Leme
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Publication number: 20100110307Abstract: A tuner system for receiving a plurality of frequency bands includes a low noise amplifier coupled with a band selection filter to select a desired band. The tuner system further includes a complex RF filter to produce a complex RF signal from the selected band. The tuner system includes two double-quadrature converters, the first double-quadrature converter frequency down-converts the complex RF signal to a complex baseband signal. The complex baseband signal passes through a baseband filter that contains two identical lowpass filters for obtaining a baseband in-phase (I) signal and a quadrature (Q) signal. The second double-quadrature converter up-converts the baseband I and Q signals to respective IF I and Q signals that are significantly free of the positive third IF harmonic. The third IF-harmonic free I and Q signals are further processed by a complex bandpass filter. The bandpass filter has a programmable frequency center and a programmable bandwidth.Type: ApplicationFiled: October 29, 2009Publication date: May 6, 2010Applicant: Synopsys, Inc.Inventors: Carlos Azeredo Leme, Ricardo Reis
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Patent number: 6154161Abstract: An integrated, multi-input audio mixer receiving a plurality of analog input signals, internally digitizing the analog input signals, digitally processing and mixing the digitized input signals and producing both digital and analog representations of the mixed inputs. All analog inputs are applied to half of a full delta-sigma analog-to-digital converter. That is, each input is applied to a respective delta-sigma modulator, but all the delta-sigma modulators share a single sigma-decimation filter. The output of each delta/sigma modulator controls a respective multiplexer having a separate input channel for each quantization level of its respective delta/sigma modulator. The output of the multiplexers is selectively applied to a summing circuit. The output from the summing circuit is applied to a D/A converter to provide an analog output, and is also applied to the single sigma-decimation filter, which recovers the mixed data from the delta/sigma modulators.Type: GrantFiled: October 7, 1998Date of Patent: November 28, 2000Assignee: Atmel CorporationInventors: Carlos Azeredo Leme, Christian Dupuy, Jose Epifanio da Franca