Patents by Inventor Carlos Chacon

Carlos Chacon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electrical center cover with machine-readable indicator confirmation of lock engagement
    Patent number: 11558972
    Abstract: A cover for an electrical center of a vehicle includes a cover member defining a first cover lock assurance (CLA) feature and configured to cover electrical components of the electrical center when the first CLA feature is fully engaged with a second CLA feature defined by a housing of the electrical center and a CLA system configured to assure the full engagement of the cover member to the housing of the electrical center, the CLA system including a third CLA feature configured to selectively engage/disengage with the first and second CLA features to engage the cover member to the housing of the electrical center and a machine-readable indicator configured to be fully visible and readable by a CLA device when the third CLA feature is fully engaged and seated within the first and second CLA features.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: January 17, 2023
    Assignee: APTIV TECHNOLOGIES LIMITED
    Inventors: Itzel Alejandra Hinojos Salayandia, Eric J. Stern, Sergio Armendariz Molina, Daniel Scott Eichorn, Daniel Alejandro Argumedo Sifuentes, Roberto Carlos Chacon
  • ELECTRICAL CENTER COVER WITH MACHINE-READABLE INDICATOR CONFIRMATION OF LOCK ENGAGEMENT
    Publication number: 20220159858
    Abstract: A cover for an electrical center of a vehicle includes a cover member defining a first cover lock assurance (CLA) feature and configured to cover electrical components of the electrical center when the first CLA feature is fully engaged with a second CLA feature defined by a housing of the electrical center and a CLA system configured to assure the full engagement of the cover member to the housing of the electrical center, the CLA system including a third CLA feature configured to selectively engage/disengage with the first and second CLA features to engage the cover member to the housing of the electrical center and a machine-readable indicator configured to be fully visible and readable by a CLA device when the third CLA feature is fully engaged and seated within the first and second CLA features.
    Type: Application
    Filed: November 19, 2020
    Publication date: May 19, 2022
    Applicant: APTIV TECHNOLOGIES LIMITED
    Inventors: Itzel Alejandra Hinojos Salayandia, Eric J. Stern, Sergio Armendariz Molina, Daniel Scott Eichorn, Daniel Alejandro Argumedo Sifuentes, Roberto Carlos Chacon
  • Methods for fabricating integrated circuits using flowable chemical vapor deposition techniques with low-temperature thermal annealing
    Patent number: 9831098
    Abstract: Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an isolation trench between two fin structures on an integrated circuit substrate, forming a flowable film in the isolation trench using a flowable chemical vapor deposition process, and annealing the flowable film to form a silicon oxide dielectric layer in the isolation trench. The annealing is performed at a temperature of less than about 200° C. with a process gas including N2 and H2O2.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: November 28, 2017
    Assignee: GLOBALFOUNDRIES, INC.
    Inventors: Xinyuan Dou, Sukwon Hong, Satyajit Shinde, Sandeep Gaan, Tao Han, Carlos Chacon, Shimpei Yamaguchi
  • METHODS FOR FABRICATING INTEGRATED CIRCUITS USING FLOWABLE CHEMICAL VAPOR DEPOSITION TECHNIQUES WITH LOW-TEMPERATURE THERMAL ANNEALING
    Publication number: 20170018452
    Abstract: Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an isolation trench between two fin structures on an integrated circuit substrate, forming a flowable film in the isolation trench using a flowable chemical vapor deposition process, and annealing the flowable film to form a silicon oxide dielectric layer in the isolation trench. The annealing is performed at a temperature of less than about 200° C. with a process gas including N2 and H2O2.
    Type: Application
    Filed: July 13, 2015
    Publication date: January 19, 2017
    Inventors: Xinyuan Dou, Sukwon Hong, Satyajit Shinde, Sandeep Gaan, Tao Han, Carlos Chacon, Shimpei Yamaguchi