Patents by Inventor Carlos Fonseca

Carlos Fonseca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11775655
    Abstract: An artificial intelligence (AI) platform to support optimization of container builds and virtual machine mounts in a distributed computing environment. A provisioning file is subject to natural language processing (NLP) and a corresponding vector representation of the file is created and subject to evaluation by a set of artificial neural networks (ANN). A first ANN assesses the representation of the file with respect to compliance and operability, and the second ANN selectively assesses the representation of the file with respect to provisioning efficiency. The provisioning file is selectively process based on the provisioning efficiency, with the processing directed at provisioning a container build or mounting a VM.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: October 3, 2023
    Assignee: International Business Machines Corporation
    Inventors: Abhishek Malvankar, John M. Ganci, Jr., Carlos A. Fonseca, Charles E. Beller
  • Publication number: 20230118939
    Abstract: An artificial intelligence (AI) platform to support selective replacement of one or more image layers of a container image build. A metadata file is subject to natural language processing and one or more corresponding vector representations are created and subject to evaluation by a set of artificial neural networks (ANNs). A first ANN assesses each vector representation with respect to compliance and operability, and the second ANN selectively assesses the vector representation(s) with respect to similarity with one or more compliant vector representations. In response to the assignment of the second score, at least one vector representation of the received metadata file is selectively replaced with at least one compliant vector representation. The metadata file is selectively provisioned with the selectively replaced vector representation(s).
    Type: Application
    Filed: October 20, 2021
    Publication date: April 20, 2023
    Applicant: International Business Machines Corporation
    Inventors: Abhishek Malvankar, Carlos A. Fonseca, Charles E. Beller, John M. Ganci, JR.
  • Patent number: 11520564
    Abstract: Embodiments are provided for intelligent recommendations for program code. In some embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components can include an evaluation component that determines that first program code pertains to a defined category representing a defined cost to execute the first program code by a cloud computing service. The computer-executable components also can include a recommendation component that generates a recommendation for second program code that satisfies a similarity criterion with respect to the first program code. The second program code pertains to a category representing a cost to execute the second program code by the cloud computing service, where the cost is less than the defined cost.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: December 6, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Abhishek Malvankar, Sara Rosenthal, Carlos A. Fonseca, Naga A. Ayachitula
  • Publication number: 20220366055
    Abstract: An artificial intelligence (AI) platform to support optimization of container builds and virtual machine mounts in a distributed computing environment. A provisioning file is subject to natural language processing (NLP) and a corresponding vector representation of the file is created and subject to evaluation by a set of artificial neural networks (ANN). A first ANN assesses the representation of the file with respect to compliance and operability, and the second ANN selectively assesses the representation of the file with respect to provisioning efficiency. The provisioning file is selectively process based on the provisioning efficiency, with the processing directed at provisioning a container build or mounting a VM.
    Type: Application
    Filed: May 11, 2021
    Publication date: November 17, 2022
    Applicant: International Business Machines Corporation
    Inventors: Abhishek Malvankar, John M. Ganci, JR., Carlos A. Fonseca, Charles E. Beller
  • Publication number: 20220291953
    Abstract: A method, computer system, and a computer program product for host validation is provided. The present invention may include receiving a job from a user. The present invention may include selecting, by a scheduler, a host in a hybrid cloud environment to run the received job. The present invention may include classifying, by a learning component, the selected host's subsystems. The present invention may include determining, based on the classification, that the selected host can run the received job.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 15, 2022
    Inventors: Abhishek Malvankar, John M. Ganci, JR., Michael Spriggs, Carlos A. Fonseca
  • Patent number: 11435393
    Abstract: Described herein are techniques related to a semiconductor fabrication process that facilitates the enhancement of systemic conformities of patterns of the fabricated semiconductor wafer. A semiconductor wafer with maximized systemic conformities of patterns will maximize the electrical properties and/or functionality of the electronic devices formed as part of the fabricated semiconductor wafer. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: September 6, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Carlos A. Fonseca, Nathan Ip, Joel Estrella
  • Publication number: 20220229639
    Abstract: Embodiments are provided for intelligent recommendations for program code. In some embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components can include an evaluation component that determines that first program code pertains to a defined category representing a defined cost to execute the first program code by a cloud computing service. The computer-executable components also can include a recommendation component that generates a recommendation for second program code that satisfies a similarity criterion with respect to the first program code. The second program code pertains to a category representing a cost to execute the second program code by the cloud computing service, where the cost is less than the defined cost.
    Type: Application
    Filed: January 20, 2021
    Publication date: July 21, 2022
    Inventors: Abhishek Malvankar, Sara Rosenthal, Carlos A. Fonseca, Naga A. Ayachitula
  • Patent number: 11346882
    Abstract: Described herein are techniques related to a semiconductor fabrication process that facilitates the enhancement of systemic conformities of patterns of the fabricated semiconductor wafer. A semiconductor wafer with maximized systemic conformities of patterns will maximize the electrical properties and/or functionality of the electronic devices formed as part of the fabricated semiconductor wafer. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: May 31, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Carlos A. Fonseca, Nathan Ip, Joel Estrella
  • Patent number: 11334333
    Abstract: The present invention may include an embodiment that receives a deployment declaration in a natural language. The embodiment may detect one or more sequencing entities and one or more parameter entities using trained natural language processing. The embodiment may sequence a configuration file based on the one or more sequencing entities. The embodiment may determine a plurality of configuration parameters in the sequenced configuration file. The embodiment may substitute a configuration parameter from the plurality of configuration parameters of the sequenced configuration file with the one or more parameter entities. The embodiment may align the plurality of configuration parameters of the sequenced configuration file based on organization compliance data and deploys a tuned cloud service using the sequenced configuration file.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: May 17, 2022
    Assignee: International Business Machines Corporation
    Inventors: Abhishek Malvankar, Shikhar Kwatra, Charles E. Beller, Carlos A. Fonseca
  • Publication number: 20220147333
    Abstract: The present invention may include an embodiment that receives a deployment declaration in a natural language. The embodiment may detect one or more sequencing entities and one or more parameter entities using trained natural language processing. The embodiment may sequence a configuration file based on the one or more sequencing entities. The embodiment may determine a plurality of configuration parameters in the sequenced configuration file. The embodiment may substitute a configuration parameter from the plurality of configuration parameters of the sequenced configuration file with the one or more parameter entities. The embodiment may align the plurality of configuration parameters of the sequenced configuration file based on organization compliance data and deploys a tuned cloud service using the sequenced configuration file.
    Type: Application
    Filed: November 10, 2020
    Publication date: May 12, 2022
    Inventors: Abhishek Malvankar, Shikhar Kwatra, Charles E. Beller, Carlos A. Fonseca
  • Publication number: 20220092242
    Abstract: Aspects of the disclosure provide a method for wafer result prediction. The method includes determining predictor parameters of a semiconductor process using domain knowledge that includes knowledge of the semiconductor process, a processing tool associated with the semiconductor process, a metrology tool, and/or the wafer. The method also includes removing collinearity among the predictor parameters to obtain key predictor parameters, and selecting a subset of the key predictor parameters based on metrology data of the wafer obtained from the metrology tool. The method further includes building a virtual metrology (VM) model on the subset of the key predictor parameters and may include predicting wafer results using the VM model.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 24, 2022
    Applicant: Tokyo Electron Limited
    Inventors: Jun SHINAGAWA, Megan WOOLEY, Toshihiro KITAO, Carlos FONSECA
  • Publication number: 20220051129
    Abstract: A scheduler node in a blockchain network may receive data associated with a machine learning model. The scheduler node may measure a drift of the machine learning model for a first aspect of the data. The scheduler node may determine if the drift of the machine learning model is greater than a threshold. The scheduler node may schedule, in response to the drift being greater than the drift threshold, a retraining transaction for the machine learning model.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 17, 2022
    Inventors: Abhishek Malvankar, Shikhar Kwatra, Jeronimo Irazabal, Carlos A. Fonseca
  • Patent number: 11244873
    Abstract: In one embodiment, a method includes obtaining wafer measurements of a characteristic of a semiconductor wafer at each of a plurality of process steps during a semiconductor wafer fabrication process, where each of the wafer measurements is associated with a spatial location on the semiconductor wafer from which the measurement is obtained. The method may further include creating a process step fingerprint from the obtained wafer measurements for each process step. The method may further include correlating the process step fingerprint of one of the plurality of process steps to the process step fingerprint of another one of the plurality of process steps to produce a transfer function.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: February 8, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Carlos A. Fonseca, Nathan Ip
  • Patent number: 10943580
    Abstract: Methods and systems for phonological clustering are disclosed. A method includes: segmenting, by a computing device, a sentence into a plurality of tokens; determining, by the computing device, a plurality of phoneme variants corresponding to the plurality of tokens; clustering, by the computing device, the plurality of phoneme variants; creating, by the computing device, an initial vectorization of the plurality of phoneme variants based on the clustering; embedding, by the computing device, the initial vectorization of the plurality of phoneme variants into a deep learning model; and determining, by the computing device, a radial set of phoneme variants using the deep learning model.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: March 9, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Craig M. Trim, John M. Ganci, Jr., James E. Bostick, Carlos A. Fonseca
  • Publication number: 20200135592
    Abstract: In one embodiment, a method includes obtaining wafer measurements of a characteristic of a semiconductor wafer at each of a plurality of process steps during a semiconductor wafer fabrication process, where each of the wafer measurements is associated with a spatial location on the semiconductor wafer from which the measurement is obtained. The method may further include creating a process step fingerprint from the obtained wafer measurements for each process step. The method may further include correlating the process step fingerprint of one of the plurality of process steps to the process step fingerprint of another one of the plurality of process steps to produce a transfer function.
    Type: Application
    Filed: October 28, 2019
    Publication date: April 30, 2020
    Inventors: Carlos A. Fonseca, Nathan Ip
  • Publication number: 20190348021
    Abstract: Methods and systems for phonological clustering are disclosed. A method includes: segmenting, by a computing device, a sentence into a plurality of tokens; determining, by the computing device, a plurality of phoneme variants corresponding to the plurality of tokens; clustering, by the computing device, the plurality of phoneme variants; creating, by the computing device, an initial vectorization of the plurality of phoneme variants based on the clustering; embedding, by the computing device, the initial vectorization of the plurality of phoneme variants into a deep learning model; and determining, by the computing device, a radial set of phoneme variants using the deep learning model.
    Type: Application
    Filed: May 11, 2018
    Publication date: November 14, 2019
    Inventors: Craig M. TRIM, John M. GANCI, JR., James E. BOSTICK, Carlos A. FONSECA
  • Publication number: 20190139798
    Abstract: Described herein are techniques related to a semiconductor fabrication process that facilitates the enhancement of systemic conformities of patterns of the fabricated semiconductor wafer. A semiconductor wafer with maximized systemic conformities of patterns will maximize the electrical properties and/or functionality of the electronic devices formed as part of the fabricated semiconductor wafer. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 9, 2019
    Inventors: Carlos A. Fonseca, Nathan Ip, Joel Estrella
  • Publication number: 20190137565
    Abstract: Described herein are techniques related to a semiconductor fabrication process that facilitates the enhancement of systemic conformities of patterns of the fabricated semiconductor wafer. A semiconductor wafer with maximized systemic conformities of patterns will maximize the electrical properties and/or functionality of the electronic devices formed as part of the fabricated semiconductor wafer. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 9, 2019
    Inventors: Carlos A. Fonseca, Nathan Ip, Joel Estrella
  • Patent number: 10048594
    Abstract: Methods and systems for PS-CAR photoresist simulation are described. In an embodiment, a method includes calibrating initial conditions for a simulation of at least one process parameter of a lithography process using a radiation-sensitive material. In such an embodiment, the radiation-sensitive material includes a first light wavelength activation threshold that controls the generation of acid to a first acid concentration in the radiation-sensitive material and controls generation of photosensitizer molecules in the radiation-sensitive material, and a second light wavelength activation threshold that can excite the photosensitizer molecules in the radiation-sensitive material that results in the acid comprising a second acid concentration that is greater than the first acid concentration, the second light wavelength being different from the first light wavelength. Further, the method may include performing a lithography process using the previously-determined at least one process parameter.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: August 14, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Michael Carcasi, Mark Somervell, Carlos Fonseca
  • Patent number: 9861445
    Abstract: The present invention refers to a portable device for identification of surgical items with magnetic markers, method for identifying surgical objects with magnetic markers and system for the prevention of retention of surgical items with magnetic markers. The present invention can be used in surgical centers, with the aim of detecting surgical elements/objects (5) retained in the patient after surgery. The present invention aims to provide instrumental support in object location surgical (5) retained inside the body cavities for detecting artifacts forgotten after a surgical procedure, by means of device and specific objects and method and system for their identification.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: January 9, 2018
    Assignee: INSTITUTO TECHNÓLOGICO DE AERONÁUTICA—ITA
    Inventors: Osamu Saotome, Rogério Dos Santos Vagner, Carlos Fonseca Pereira Evaldo, José Elias Matieli