Abstract: An example frequency converter includes a drift canceling loop with a balanced delay and a linear signal path (e.g., linear with respect to frequency scaling, amplitude modulation, and/or phase modulation). One side of the drift canceling loop includes a fixed delay, and the opposite side includes an adjustable, complementary delay. The adjustable, complementary delay facilitates precision matching of the signal delays on each side of the loop over a range of frequencies, which results in a significant improvement in noise cancelation, particularly at large offsets to the carrier, while permitting the use of a higher noise, but very fast tuning course scale oscillator. The linear signal path from the signal generator to an RF output facilitates modulation of the signal by the signal generator. A modular format is an advantageous embodiment of the invention that includes the removal of the frequency synthesizer's low phase noise reference into a separate module.

Abstract: An example frequency converter includes a drift canceling loop with a balanced delay and a linear signal path (e.g., linear with respect to frequency scaling, amplitude modulation, and/or phase modulation). One side of the drift canceling loop includes a fixed delay, and the opposite side includes an adjustable, complementary delay. The adjustable, complementary delay facilitates precision matching of the signal delays on each side of the loop over a range of frequencies, which results in a significant improvement in noise cancelation, particularly at large offsets to the carrier, while permitting the use of a higher noise, but very fast tuning course scale oscillator. The linear signal path from the signal generator to an RF output facilitates modulation of the signal by the signal generator. A modular format is an advantageous embodiment of the invention that includes the removal of the frequency synthesizer's low phase noise reference into a separate module.

Abstract: An example frequency converter includes a drift canceling loop with a balanced delay and a linear signal path (e.g., linear with respect to frequency scaling, amplitude modulation, and/or phase modulation). One side of the drift canceling loop includes a fixed delay, and the opposite side includes an adjustable, complementary delay. The adjustable, complementary delay facilitates precision matching of the signal delays on each side of the loop over a range of frequencies, which results in a significant improvement in noise cancellation, particularly at large offsets to the carrier, while permitting the use of a higher noise, but very fast tuning course scale oscillator. The linear signal path from the signal generator to an RF output facilitates modulation of the signal by the signal generator. A modular format is an advantageous embodiment of the invention that includes the removal of the frequency synthesizer's low phase noise reference into a separate module.

Abstract: An example frequency converter includes a drift canceling loop with a balanced delay and a linear signal path (e.g., linear with respect to frequency scaling, amplitude modulation, and/or phase modulation). One side of the drift canceling loop includes a fixed delay, and the opposite side includes an adjustable, complementary delay. The adjustable, complementary delay facilitates precision matching of the signal delays on each side of the loop over a range of frequencies, which results in a significant improvement in noise cancelation, particularly at large offsets to the carrier, while permitting the use of a higher noise, but very fast tuning course scale oscillator. The linear signal path from the signal generator to an RF output facilitates modulation of the signal by the signal generator. A modular format is an advantageous embodiment of the invention that includes the removal of the frequency synthesizer's low phase noise reference into a separate module.

Abstract: An example frequency converter includes a drift canceling loop with a balanced delay and a linear signal path (e.g., linear with respect to frequency scaling, amplitude modulation, and/or phase modulation). One side of the drift canceling loop includes a fixed delay, and the opposite side includes an adjustable, complementary delay. The adjustable, complementary delay facilitates precision matching of the signal delays on each side of the loop over a range of frequencies, which results in a significant improvement in noise cancelation, particularly at large offsets to the carrier, while permitting the use of a higher noise, but very fast tuning course scale oscillator. The linear signal path from the signal generator to an RF output facilitates modulation of the signal by the signal generator. A modular format is an advantageous embodiment of the invention that includes the removal of the frequency synthesizer's low phase noise reference into a separate module.

Abstract: Systems for transmitting an application message between nodes of a clustered data processing system are disclosed. One system includes a determination of whether one or more application messages may currently be transmitted to a first node of a plurality of nodes from a second node of the plurality of nodes. The system further includes processing the one or more application messages in response to a determination that the one or more application messages may be currently transmitted.

Abstract: A protective cap for covering an exposed end of any sized reinforcing bar (rebar or reinforced steel) is provided. The protective cap is configured to be affixed to an exposed end of the reinforcing bar and protect falling objects from being punctured by the reinforcing bar. The protective cap includes a magnet embedded and secured within the protective cap to secure the protective cap to the reinforcing bar.

Abstract: Systems for transmitting an application message between nodes of a clustered data processing system are disclosed. One system includes a determination of whether one or more application messages may currently be transmitted to a first node of a plurality of nodes from a second node of the plurality of nodes. The system further includes processing the one or more application messages in response to a determination that the one or more application messages may be currently transmitted.

Abstract: Systems for transmitting an application message between nodes of a clustered data processing system are disclosed. One system includes a determination of whether one or more application messages may currently be transmitted to a first node of a plurality of nodes from a second node of the plurality of nodes. The system further includes processing the one or more application messages in response to a determination that the one or more application messages may be currently transmitted.

Abstract: Systems for transmitting an application message between nodes of a clustered data processing system are disclosed. One system includes a determination of whether one or more application messages may currently be transmitted to a first node of a plurality of nodes from a second node of the plurality of nodes. The system further includes processing the one or more application messages in response to a determination that the one or more application messages may be currently transmitted.

Abstract: A method and system for transmitting an application message between nodes of a clustered data processing system is disclosed. According to one embodiment, a method, embodied within a machine-readable medium, is provided according to which a determination is made whether one or more application messages to be transmitted to a first node of a plurality of nodes from a second node of the plurality may be currently transmitted. The method of the described embodiment further includes the processing of the one or more application messages in response to a determination whether the one or more application messages may be currently transmitted.

Abstract: A broadband, high-speed RF step attenuator implemented using long-lifetime PIN diode switches is presented which provides step attenuation across a significant portion of the entire RF frequency spectrum while maintaining minimal insertion loss, return loss, and harmonics.

Abstract: A broadband, high-speed RF step attenuator implemented using long-lifetime PIN diode switches is presented which provides step attenuation across a significant portion of the entire RF frequency spectrum while maintaining minimal insertion loss, return loss, and harmonics.

Abstract: An apparatus, method, and computer program for facilitating disaster recovery of a first computer system, wherein first data residing on a first storage device associated with the first computer system is recoverable from second data residing on a second storage device associated with a second computer system and wherein the second storage device is operable to have an associated state of powered up or powered down. A receiver receives an update operation for updating the second storage device. A processor updates anon-volatile storage means with the update operation, prior to update of the second storage device, wherein the non-volatile storage means is associated with the second computer system.

Abstract: An apparatus, method, and computer program for facilitating disaster recovery of a first computer system, wherein first data residing on a first storage device associated with the first computer system is recoverable from second data residing on a second storage device associated with a second computer system and wherein the second storage device is operable to have an associated state of powered up or powered down. A receiver receives an update operation for updating the second storage device. A processor updates anon-volatile storage means with the update operation, prior to update of the second storage device, wherein the non-volatile storage means is associated with the second computer system.

Abstract: A method and apparatus for managing a loop network, the loop network (200) including at least one loop (206, 208), a plurality of devices (210) connected to the at least one loop (206, 208) via ports (211, 212), wherein at least two of the devices are initiators (207, 209). The method includes each initiator (207, 209) sending a frame to all other initiators (207, 209) in the loop network (200) identifying any ports (211, 212) which should not be used. Each initiator (207, 209) merges the information from all other initiators (207, 209) with its own information identifying any ports (211, 212) which should not be used resulting in all the initiators (207, 209) generating a single list of ports (211, 212) to be used which is consistent across all the initiators (207, 209). Each initiator (207, 209) applies an algorithm (300) to determine a common set of ports (211, 212) to be used by all the initiators (207, 209) and to balance port accesses across the loop network (200).

Abstract: An apparatus operable with a host and at least first and second data storage for avoiding overwriting of a stored data item in the second data storage by a copy services system is provided. The apparatus includes a storage use analyzer for determining the availability of the second data storage. A copy services requester communicates with the host to receive a request to establish a copy services relationship, using the second data storage as a target data storage. A request blocking and passing component passes the request to establish a copy services relationship using the second data storage as the target data storage, responsive to a positive determination of availability of the second storage. The request blocking and passing component may also block the request responsive to a negative determination of availability of the second data storage.

Abstract: An apparatus and method for performing a shuffle operation on packed data is described. In one embodiment, a 128-bit packed data operand having at eight data elements is accessed. In one embodiment, one of the data elements in the upper half of the data operand is shuffled into the upper half of a destination register. In another embodiment, one of the data elements in the lower half of the data operand is shuffled into the lower half of a destination register.

Abstract: The exemplary embodiments of this invention provide in one non-limiting aspect thereof a control device operable to execute a filter layer, and includes a first interface for coupling to a first storage device and a second interface for coupling to a second storage device. The filter layer receives communications and, in a first mode, synchronously transmits the communications to the first storage device and asynchronously transmits the communications to the second storage device, and, in a second mode, synchronously transmits the communications to the second storage device.

Abstract: Methods and apparatus are provided for copying data from a primary storage facility to a secondary storage facility which reduce the workload on the storage controller in the primary facility and minimize bandwidth usage. The primary storage facility includes a primary data replication appliance which transfers data to a secondary replication appliance. Updated data from a host is both stored through a storage controller in the primary facility and also received by the primary replication appliance. Logic in the primary replication appliance determines whether the immediately previous version of the data is in a buffer from a previous storage operation. If so, the current (updated) version of the data is compared with the previous version and the difference, such as calculated through a bit-wise exclusive-OR operation, is transferred to the secondary replication appliance.