Abstract: An apparatus has memory management circuitry to control access to a memory system based on access control information defined in table entries of a table structure comprising at least two levels of access control table. Table accessing circuitry accesses the table structure to obtain the access control information corresponding to a target address. For a given access control table at a given level of the table structure other than a starting level, the table accessing circuitry selects a selected table entry of the given access control table corresponding to the target address, based on an offset portion of the target address. A size of the offset portion is selected based on a variable nesting control parameter specified in a table entry of a higher-level access control table at a higher level of the table structure than the given access control table.

Abstract: An apparatus and method are provided for storing a plurality of translation entries in a cache, each translation entry corresponding to one of a plurality of page table entries and defining a translation between a first address and a second address, and encoding control information indicative of an attribute of each page table entry; returning, in response to a lookup querying a first lookup address, a corresponding second address when the first lookup address corresponds to one of the plurality of translation entries stored in the cache; modifying at least some of the control information in response to notification of a modification of the attribute in a page table entry; and retaining in the cache at least one translation entry corresponding to the page table entry for use in a subsequent address lookup querying a corresponding first lookup address in response to the notification of the modification of the attribute in the page table entry.

Abstract: An apparatus has memory management circuitry to control access to a memory system based on access control information defined in table entries of a table structure comprising at least two levels of access control table. Table accessing circuitry accesses the table structure to obtain the access control information corresponding to a target address. For a given access control table at a given level of the table structure other than a starting level, the table accessing circuitry selects a selected table entry of the given access control table corresponding to the target address, based on an offset portion of the target address. A size of the offset portion is selected based on a variable nesting control parameter specified in a table entry of a higher-level access control table at a higher level of the table structure than the given access control table.

Abstract: A data processing apparatus includes processing circuitry to process an event stream that includes one or more high power events. Tracking circuitry tracks the one or more high power events and power management circuitry manages power consumption by controlling a voltage supply and a frequency of a clock signal provided to the processing circuitry. The power management circuitry controls an extent to which execution by the processing circuitry of the high power events is restricted.

Abstract: A data processing apparatus is provided, comprising controller circuitry. The controller circuitry includes processing circuitry that executes a stream of instructions. Communication circuitry obtains a command from shared storage circuitry to cause the processing circuitry to execute a subset of instructions in the stream of instructions, and proactively transmit additional data to the shared storage circuitry.

Abstract: A data processing apparatus includes processing circuitry to process an event stream that includes one or more high power events. Tracking circuitry tracks the one or more high power events and power management circuitry manages power consumption by controlling a voltage supply and a frequency of a clock signal provided to the processing circuitry. The power management circuitry controls an extent to which execution by the processing circuitry of the high power events is restricted.

Abstract: A data processing system and a method of runtime configuration of the data processing system are disclosed. The data processing system comprises a plurality of home nodes, and for a data store associated with a slave node in the data processing system, for each home node of the plurality of home nodes a modified size of the data store is determined. The modified size is based on a storage capacity of the data store and at least one additional property of the data processing system. A chosen home node of the plurality of home nodes is selected which satisfies a minimization criterion for the modified size, and the chosen home node is paired with the slave node.

Abstract: A data processing system and a method of runtime configuration of the data processing system are disclosed, the data processing system comprising a plurality of home nodes, and the method comprising, for a data store associated with a slave node in the data processing system, determining for each home node of the plurality of home nodes a modified size of the data store, the modified size being based on a storage capacity of the data store and at least one additional property of the data processing system. The method also comprises selecting a chosen home node of the plurality of home nodes which satisfies a minimization criterion for the modified size, and pairing the chosen home node with the slave node.

Abstract: A data processing apparatus is provided, comprising controller circuitry. The controller circuitry includes processing circuitry that executes a stream of instructions. Communication circuitry obtains a command from shared storage circuitry to cause the processing circuitry to execute a subset of instructions in the stream of instructions, and proactively transmit additional data to the shared storage circuitry.

Abstract: An apparatus (10) comprising an event monitor (20) for observing events occurring within the computing device (10) and a prediction component (22), wherein the prediction component (22) is configured to cause an operating parameter associated with the power consumption of the computing device (10) to change if a sequence of events observed by the event monitor (20) corresponds to a pre-defined sequence associated with the change in the operating parameter.