Patents by Inventor Carlos Jorge Ramiro Proenca Augusto

Carlos Jorge Ramiro Proenca Augusto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Vertical MISFET devices
    Patent number: 6207977
    Abstract: The present invention relates to processes for fabrication of Vertical MISFET devices or a stack of several of such devices. The Vertical MISFET device comprises a highly doped drain region, a non or lowly doped channel region and a source region forming a heterojunction with the channel region. The source region comprises a lowly doped part which contacts the channel region and a highly doped part which contacts the lowly doped part.
    Type: Grant
    Filed: October 21, 1998
    Date of Patent: March 27, 2001
    Assignee: InterUniversitaire Microelektronica
    Inventor: Carlos Jorge Ramiro Proenca Augusto
  • CMOS integration process having vertical channel
    Patent number: 5963800
    Abstract: The present invention relates to processes for fabrictation of Vertical MISFET devices or a stack of several Vertical MISFET devices having high fabrication yield.
    Type: Grant
    Filed: June 17, 1996
    Date of Patent: October 5, 1999
    Assignee: Interuniversitair Micro-Elektronica Centrum (IMEC vzw)
    Inventor: Carlos Jorge Ramiro Proenca Augusto
  • Vertical MISFET devices
    Patent number: 5920088
    Abstract: The present invention relates to Silicon Germanium-based Vertical MISFET devices allowing smaller device size and exhibiting significant advantages over prior devices related to the reduction of drain induced barrier lowering and parasitic capacitance and permitting a higher integration density.
    Type: Grant
    Filed: June 17, 1996
    Date of Patent: July 6, 1999
    Assignee: Interuniversitair Micro-Electronica Centrum (IMEC vzw)
    Inventor: Carlos Jorge Ramiro Proenca Augusto
  • DRAM applications using vertical MISFET devices
    Patent number: 5914504
    Abstract: The present invention relates to RAM circuits comprising memory cells and logic circuitry wherein each of the memory cells comprise at least one Vertical MISFET device comprising a stack of several layers a source layer, a channel layer, a drain layer and a capacitor on the top of the stack of several layers of the Vertical MISFET device.
    Type: Grant
    Filed: June 17, 1996
    Date of Patent: June 22, 1999
    Assignee: IMEC vzw
    Inventor: Carlos Jorge Ramiro Proenca Augusto