Patents by Inventor Carlos Ribeiro

Carlos Ribeiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240005399
    Abstract: A system and method of optimizing cryptographic mining yields includes analyzing, by a cryptocurrency mining selection system, data associated with factors of interest for one or more cryptocurrencies using machine learning algorithms. Data that is determined to be predictive of the future value of newly mined tokens is used to determine which tokens will have the highest and lowest future values. Based on the predicted value of tokens in the future and the current value of those tokens for each cryptocurrency, the system outputs one or more instructions to buy tokens in cryptocurrencies predicted to increase in value, to sell tokens in cryptocurrencies predicted to decrease in value, and to instruct associated cryptocurrency mining hardware to switch to generating new tokens in one or more selected cryptocurrencies to maximize yields.
    Type: Application
    Filed: July 5, 2023
    Publication date: January 4, 2024
    Inventors: RUDÁ FARIAS FORMOLO PELLINI, REGIS ADAIR VARGAS CARDOSO, FELIPE EDUARDO ROSA, IGOR ALEXANDRE CLEMENTE DE MORAIS, CLEVERTON CARLOS RIBEIRO
  • Patent number: 11702889
    Abstract: The present invention refers to a method of drilling a marine wellbore with fluid reverse circulation without using drilling riser tubulars. In reverse circulation drilling, the fluid return with gravels occurs inside the drill string (17) and the injection of clean fluid is done through the annular of the well, so that, having a rotating head over the BOP (19), or inside it, the use of riser tubulars as a flow line for the fluid return with gravels is disposed, using instead the drill string (17). For the kill and choke lines, as well as for fluid injection, rigid or flexible lines can be used, eliminating the need to use drilling risers, thus releasing large load capacity and space on the probe. The method of this invention also eliminates the need for large volumes of fluid to fill entire riser tubulars. The entire operation can be done without the need for subsea pumps or concentric columns.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: July 18, 2023
    Assignee: PETROLEO BRASILEIRO S.A.—PETROBRAS
    Inventors: Joseir Gandra Percy, Roni Abensur Gandelman, Guilherme Ribeiro Magalhaes, Emilio Cesar Cavalcante Melo Da Silva, Guilherme Siqueira Vanni, Augusto Borella Hougaz, Joao Carlos Ribeiro Placido, Hugo Francisco Lisboa Santos
  • Patent number: 11699183
    Abstract: A system and method of optimizing cryptographic mining yields includes analyzing, by a cryptocurrency mining selection system, data associated with factors of interest for one or more cryptocurrencies using machine learning algorithms. Data that is determined to be predictive of the future value of newly mined tokens is used to determine which tokens will have the highest and lowest future values. Based on the predicted value of tokens in the future and the current value of those tokens for each cryptocurrency, the system outputs one or more instructions to buy tokens in cryptocurrencies predicted to increase in value, to sell tokens in cryptocurrencies predicted to decrease in value, and to instruct associated cryptocurrency mining hardware to switch to generating new tokens in one or more selected cryptocurrencies to maximize yields.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: July 11, 2023
    Assignee: WT Data Mining and Science Corp.
    Inventors: Rudá Farias Formolo Pellini, Regis Adair Vargas Cardoso, Felipe Eduardo Rosa, Igor Alexandre Clemente De Morais, Cleverton Carlos Ribeiro
  • Publication number: 20220307322
    Abstract: The present invention refers to a method of drilling a marine wellbore with fluid reverse circulation without using drilling riser tubulars. In reverse circulation drilling, the fluid return with gravels occurs inside the drill string (17) and the injection of clean fluid is done through the annular of the well, so that, having a rotating head over the BOP (19), or inside it, the use of riser tubulars as a flow line for the fluid return with gravels is disposed, using instead the drill string (17). For the kill and choke lines, as well as for fluid injection, rigid or flexible lines can be used, eliminating the need to use drilling risers, thus releasing large load capacity and space on the probe. The method of this invention also eliminates the need for large volumes of fluid to fill entire riser tubulars. The entire operation can be done without the need for subsea pumps or concentric columns.
    Type: Application
    Filed: March 18, 2022
    Publication date: September 29, 2022
    Applicant: PETROLEO BRASILEIRO S.A. - PETROBRAS
    Inventors: Joseir Gandra PERCY, Roni Abensur GANDELMAN, Guilherme Ribeiro MAGALHAES, Emilio Cesar Cavalcante Melo Da SILVA, Guilherme Siqueira VANNI, Augusto Borella HOUGAZ, Joao Carlos Ribeiro PLACIDO, Hugo Francisco Lisboa SANTOS
  • Patent number: 11282148
    Abstract: The present invention relates to a device for use in the farming sector. More specifically, the invention relates to remotely obtaining farm climate and biometric variables. It is an object of the present invention to provide a method for automatic integration of farm climate and/or biometric variables which comprises: obtaining data on a set of farm climate and/or biometric variables from a controller, equalizing the collected data on a set of farm climate and/or biometric variables to pre-defined units, and transmitting such equalized data to a remote server. It thus provides an automatized way of integrating in a web connected environment information from different farm climate and/or biometric controllers. It is also an object of the present invention to provide a device which implements the method and which may comprise a room connection unit (104), a data processing unit (103), a non-volatile data buffering unit (102) and a remote connection unit (101).
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: March 22, 2022
    Inventors: Jose Miguel Da Silva Simoes De Carvalho, Miguel Antonio Damas De Matos, Samuel Carlos Ribeiro Alves Da Silva
  • Publication number: 20210332371
    Abstract: A method for increasing the efficiency of protein production is described, said method employing a a nucleic acid with a specific non-coding nucleotide sequence, which strongly increases protein production in several eukaryotic systems, as well as the compositions that contain this nucleic acid sequence. The nucleic acid sequence and method can be advantageously used as a new tool to boost protein production in biotechnology and/or biopharmaceutical applications, due to its ability to enhance protein production derived from a genetic construct, a gene expression or a reporter vector, in zebrafish, fruit fly or other model organisms, as well as in mammalian or human cells.
    Type: Application
    Filed: October 9, 2019
    Publication date: October 28, 2021
    Inventors: Marta OLIVEIRA, Ana JESUS, Jaime FREITAS, Alexandra MOREIRA, José Carlos RIBEIRO BESSA
  • Patent number: 10972002
    Abstract: A regulator clamp circuit includes a comparison circuit having a sample and hold circuit. The comparison circuit compares a regulated voltage with a sampled voltage of the regulated voltage from a previous time. In some embodiments, the sampled voltage can be determined during a sampling phase that occurs prior to a clamp regulation phase. During the clamp regulation phase, the comparison circuit compares the regulated voltage with the sampled voltage and outputs a signal to activate an actuator circuit to clamp the regulated voltage when the regulated voltage terminal has a higher amount of charge than desired.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: April 6, 2021
    Assignee: NXP USA, INC.
    Inventors: Marcos Mauricio Pelicia, Luis Enrique Del Castillo, Eduardo Ribeiro da Silva, Ivan Carlos Ribeiro do Nascimento
  • Publication number: 20210019841
    Abstract: The present invention relates to a device for use in the farming sector. More specifically, the invention relates to remotely obtaining farm climate and biometric variables. It is an object of the present invention to provide a method for automatic integration of farm climate and/or biometric variables which comprises: obtaining data on a set of farm climate and/or biometric variables from a controller, equalizing the collected data on a set of farm climate and/or biometric variables to pre-defined units, and transmitting such equalized data to a remote server. It thus provides an automatized way of integrating in a web connected environment information from different farm climate and/or biometric controllers. It is also an object of the present invention to provide a device which implements the method and which may comprise a room connection unit (104), a data processing unit (103), a non-volatile data buffering unit (102) and a remote connection unit (101).
    Type: Application
    Filed: October 18, 2018
    Publication date: January 21, 2021
    Inventors: Jose Miguel DA SILVA SIMOES DE CARVALHO, Miguel Antonio DAMAS DE MATOS, Samuel Carlos RIBEIRO ALVES DA SILVA
  • Publication number: 20200342531
    Abstract: A system and method of optimizing cryptographic mining yields includes analyzing, by a cryptocurrency mining selection system, data associated with factors of interest for one or more cryptocurrencies using machine learning algorithms. Data that is determined to be predictive of the future value of newly mined tokens is used to determine which tokens will have the highest and lowest future values. Based on the predicted value of tokens in the future and the current value of those tokens for each cryptocurrency, the system outputs one or more instructions to buy tokens in cryptocurrencies predicted to increase in value, to sell tokens in cryptocurrencies predicted to decrease in value, and to instruct associated cryptocurrency mining hardware to switch to generating new tokens in one or more selected cryptocurrencies to maximize yields.
    Type: Application
    Filed: August 21, 2019
    Publication date: October 29, 2020
    Inventors: RUDÁ FARIAS FORMOLO PELLINI, REGIS ADAIR VARGAS CARDOSO, FELIPE EDUARDO ROSA, IGOR ALEXANDRE CLEMENTE DE MORAIS, CLEVERTON CARLOS RIBEIRO
  • Patent number: 10763846
    Abstract: An analog switch circuit is provided. The circuit includes a branch coupled between an input terminal and an output terminal. The branch is configured to transfer an input signal at the input terminal to the output terminal when a control signal is at a first state. A transistor in the branch includes a current electrode coupled at the input terminal and is configured for receiving the input signal having a voltage exceeding a voltage rating of the transistor. A level shifter includes an output coupled to a control electrode of the transistor and is configured to provide a first voltage sufficient to cause the transistor to be conductive without exceeding the voltage rating of the first transistor when the control signal is at the first state. A voltage generator is coupled to the level shifter and is configured to generate the first voltage based on the input signal.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: September 1, 2020
    Assignee: NXP USA, Inc.
    Inventors: Marcos Mauricio Pelicia, Ivan Carlos Ribeiro do Nascimento, Bruno Bastos Cardoso
  • Patent number: 10530365
    Abstract: A low voltage level shifter that is suitable for use with subthreshold logic. In one embodiment, the low voltage level shifter includes first and second input transistors coupled to first and second input nodes, respectively, that receive complementary low voltage input signals. A circuit is coupled to the first and second input transistors and to first and second output nodes that generate complementary high voltage output signals. The circuit is configured to transmit a first current to the second output node when the first input transistor is activated, wherein the first current is substantially equal to current drawn by the first input transistor when it is activated. The circuit is also configured to transmit a second current to the first output node when the second input transistor is activated, wherein the second current is substantially equal to current drawn by the second input transistor when it is activated.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: January 7, 2020
    Assignee: NXP USA, Inc.
    Inventor: Ivan Carlos Ribeiro do Nascimento
  • Publication number: 20190393877
    Abstract: A low voltage level shifter that is suitable for use with subthreshold logic. In one embodiment, the low voltage level shifter includes first and second input transistors coupled to first and second input nodes, respectively, that receive complementary low voltage input signals. A circuit is coupled to the first and second input transistors and to first and second output nodes that generate complementary high voltage output signals. The circuit is configured to transmit a first current to the second output node when the first input transistor is activated, wherein the first current is substantially equal to current drawn by the first input transistor when it is activated. The circuit is also configured to transmit a second current to the first output node when the second input transistor is activated, wherein the second current is substantially equal to current drawn by the second input transistor when it is activated.
    Type: Application
    Filed: June 20, 2018
    Publication date: December 26, 2019
    Inventor: Ivan Carlos Ribeiro do Nascimento
  • Patent number: 10396790
    Abstract: An integrated circuit includes a digital logic circuit, a multiplexer (MUX) having a first and a second data input, a control input, and an output coupled to an input of the digital logic circuit. The second data input is coupled to receive a high frequency clock signal. The integrated circuit includes a very low frequency (VLF) clock is configured to provide a VLF clock signal when enabled, and a counter coupled to receive the VLF clock signal and configured to toggle an output of the counter upon counting a predetermined number of cycles of the VLF clock signal. The output of the counter is coupled to the first data input of the MUX. The MUX is configured to provide the first data input as the output of the MUX during a low power mode, and otherwise to provide the second data input as the output of the MUX.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: August 27, 2019
    Assignee: NXP USA, Inc.
    Inventors: Luis Francisco P. Junqueira De Andrade, Ivan Carlos Ribeiro Do Nascimento, Armando Gomes Da Silva, Jr., Marcos Da Costa Barros
  • Patent number: 10394264
    Abstract: A back bias voltage generator circuit includes a first resistive element connected in series with a second resistive element; a first amplifier having a first input coupled to an input voltage, a second input coupled to a first node at a first terminal of the first resistive element, and an output coupled to an N-polarity metal-oxide semiconductor (NMOS) bias voltage node. A second amplifier has a first input coupled to a symmetrical voltage, a second input coupled to a second node between a second terminal of the first resistive element and a first terminal of the second resistive element, and an output coupled to a P-polarity metal-oxide semiconductor (PMOS) bias voltage node and the second terminal of the second resistive element. The symmetrical voltage is between a highest supply voltage and a lowest supply voltage coupled to the first amplifier.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: August 27, 2019
    Assignee: NXP USA, Inc.
    Inventors: Ricardo Pureza Coimbra, Javier Mauricio Olarte Gonzalez, Ivan Carlos Ribeiro do Nascimento, Felipe Ricardo Clayton, Stefano Pietri, Charles Eric Seaberg
  • Publication number: 20190250656
    Abstract: A back bias voltage generator circuit includes a first resistive element connected in series with a second resistive element; a first amplifier having a first input coupled to an input voltage, a second input coupled to a first node at a first terminal of the first resistive element, and an output coupled to an N-polarity metal-oxide semiconductor (NMOS) bias voltage node. A second amplifier has a first input coupled to a symmetrical voltage, a second input coupled to a second node between a second terminal of the first resistive element and a first terminal of the second resistive element, and an output coupled to a P-polarity metal-oxide semiconductor (PMOS) bias voltage node and the second terminal of the second resistive element. The symmetrical voltage is between a highest supply voltage and a lowest supply voltage coupled to the first amplifier.
    Type: Application
    Filed: February 9, 2018
    Publication date: August 15, 2019
    Inventors: Ricardo Pureza Coimbra, Javier Mauricio Olarte Gonzalez, Ivan Carlos Ribeiro do Nascimento, Felipe Ricardo Clayton, Stefano Pietri, Charles Eric Seaberg
  • Patent number: 10320387
    Abstract: An integrated circuit includes a digital logic circuit having a first transistor and a second transistor, a replica circuit having a first transistor and a second transistor which replicate the first transistor and second transistor of the digital logic circuit, and a storage circuit configured to store a static state indicator. The circuit also includes a comparison circuit configured to compare threshold voltages of the first and second transistor of the replica circuit, and having an output coupled to provide the static state indicator to the storage circuit, and a selection circuit configured to provide the state indicator to an input of the digital logic circuit and an input of the replica circuit during a lower power mode and to provide a run mode signal instead of the state indicator to the input of the digital logic signal and the input of the replica circuit during a high power mode.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: June 11, 2019
    Assignee: NXP USA, Inc.
    Inventors: Ivan Carlos Ribeiro Do Nascimento, Armando Gomes Da Silva, Jr.
  • Patent number: 10254317
    Abstract: An Integrated Circuit (IC) as described herein may include a first logic circuit, a second logic circuit coupled to the first logic circuit via a level shifter, and a safe state circuit coupled to the first logic circuit and to a first input of a logic gate. For example, a second input of the logic gate may be coupled to an output of the level shifter, and an output of the logic gate may be coupled to the second logic circuit. The safe state circuit may further include a front-end portion; a reversible current mirror portion coupled to the front-end portion; and a voltage-level translation portion coupled to the reversible current mirror portion.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: April 9, 2019
    Assignee: NXP USA, Inc.
    Inventor: Ivan Carlos Ribeiro do Nascimento
  • Patent number: 10245616
    Abstract: A system for the radiation treatment of substrates, which includes at least one radiation source above the substrate holders in a chamber, which holders are to be equipped with substrates that are to be treated, and the chamber has means for maintaining a gas flow in the chamber, having at least one gas inlet and at least one gas outlet, characterized in that the at least one gas inlet is situated in the vicinity of the substrate holders so that gas flowing in by means of the at least one gas inlet first flows around the substrate holders before either exiting the chamber directly via the gas outlet or exiting after flowing around the at least one radiation source.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: April 2, 2019
    Assignee: Oerlikon Surface Solutions AG, Pfäffikon
    Inventor: Carlos Ribeiro
  • Patent number: 10226609
    Abstract: The present invention relates to a dispensing mechanism (2) for delivery of pharmaceutical forms (4) into body holes and an applicator (I) comprising the novel dispensing mechanism (2). The pharmaceutical form dispensing mechanism (2) Comprises a rod (2A) connected to a flexible member (2B). One end of the rod is free from constraints in order to allow its axial movement. The other end of the rod is cooperatively connected to said flexible member (2B). The flexible member has a rounded or angular shape, being able to be deformed and being provided with shape memory. The flexible member (2B) extends in a direction perpendicular to the direction of a compression force applied to it and recovers its original shape when said compression force is withdrawn, thereby imparting, respectively, a forward or rearward movement to the rod (2A), namely when a part (2C) thereof is immobilized in the body (3) of the applicator.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: March 12, 2019
    Assignee: BEYONDDEVICES LDA
    Inventor: Rui Carlos Ribeiro Redol
  • Patent number: 10214158
    Abstract: The present invention relates to a decorative part, comprising an electroplated layer array applied to a plastic substrate. On the electroplated layer array, a PVD layer array having an adhesive layer, a mixed layer and a color-providing cover layer is provided, wherein the mixed layer provides for durability, in particular corrosion protection, and the necessary hardness of the surface.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: February 26, 2019
    Assignee: OERLIKON SURFACE SOLUTIONS AG, PFÄFFIKON
    Inventors: Carlos Ribeiro, Sascha Bauer