Abstract: Circuits and methods that provide for fast power up and power down times in a multi-stage LDO regulator. In one embodiment, a multi-stage LDO regulator circuit includes, for each stage for which fast power up and/or power down times are desired, at least one transconductance amplifier coupled and configured to compare a primary reference voltage to one of a secondary reference voltage for the stage or an output voltage of the stage, and coupling and configuring the at least one transconductance amplifier to charge and/or discharge an associated capacitor to achieve a desired charge level within a specified time independently of the value of the associated capacitor. In general, the transconductance amplifiers of each stage are configured to charge and/or discharge an associated capacitor in synchronism with a voltage present on the primary reference voltage input.

Abstract: Circuits and methods that provide for fast power up and power down times in a multi-stage LDO regulator. In one embodiment, a multi-stage LDO regulator circuit includes, for each stage for which fast power up and/or power down times are desired, at least one transconductance amplifier coupled and configured to compare a primary reference voltage to one of a secondary reference voltage for the stage or an output voltage of the stage, and coupling and configuring the at least one transconductance amplifier to charge and/or discharge an associated capacitor to achieve a desired charge level within a specified time independently of the value of the associated capacitor. In general, the transconductance amplifiers of each stage are configured to charge and/or discharge an associated capacitor in synchronism with a voltage present on the primary reference voltage input.

Abstract: Circuits and methods that provide for fast power up and power down times in a multi-stage LDO regulator. In one embodiment, a multi-stage LDO regulator circuit includes, for each stage for which fast power up and/or power down times are desired, at least one transconductance amplifier coupled and configured to compare a primary reference voltage to one of a secondary reference voltage for the stage or an output voltage of the stage, and coupling and configuring the at least one transconductance amplifier to charge and/or discharge an associated capacitor to achieve a desired charge level within a specified time independently of the value of the associated capacitor. In general, the transconductance amplifiers of each stage are configured to charge and/or discharge an associated capacitor in synchronism with a voltage present on the primary reference voltage input.

Abstract: Methods and apparatuses for protecting a low voltage (LV) circuit implemented with LV transistors are presented. Protection is provided via a protection circuit operating in a high voltage domain defined by a varying supply voltage and a reference ground. The protection circuit generates high side, VH, and low side, VL, voltages to the LV circuit, while protecting the LV circuits from high voltage and maintaining a minimum difference voltage, VH?VL. The protection circuit generates the difference voltage based on a voltage across a resistor of a resistor ladder that is coupled between the varying supply voltage and the reference ground. The protection circuit includes a clamp circuit that limits the minimum difference voltage for low values of the supply voltage.

Abstract: Methods and apparatuses for protecting a low voltage (LV) circuit implemented with LV transistors are presented. Protection is provided via a protection circuit operating in a high voltage domain defined by a varying supply voltage and a reference ground. The protection circuit generates high side, VH, and low side, VL, voltages to the LV circuit, while protecting the LV circuits from high voltage and maintaining a minimum difference voltage, VH?VL. The protection circuit generates the difference voltage based on a voltage across a resistor of a resistor ladder that is coupled between the varying supply voltage and the reference ground. The protection circuit includes a clamp circuit that limits the minimum difference voltage for low values of the supply voltage.

Abstract: Circuits and methods that provide for fast power up and power down times in a multi-stage LDO regulator. In one embodiment, a multi-stage LDO regulator circuit includes, for each stage for which fast power up and/or power down times are desired, at least one transconductance amplifier coupled and configured to compare a primary reference voltage to one of a secondary reference voltage for the stage or an output voltage of the stage, and coupling and configuring the at least one transconductance amplifier to charge and/or discharge an associated capacitor to achieve a desired charge level within a specified time independently of the value of the associated capacitor. In general, the transconductance amplifiers of each stage are configured to charge and/or discharge an associated capacitor in synchronism with a voltage present on the primary reference voltage input.

Abstract: Startup charge balancing circuits and methods for capacitive charge pumps that avoid large in-rush currents and resulting voltage spikes. Embodiments include a charge balance circuit coupled to a corresponding charge pump capacitor of a charge pump. The charge balance circuit includes a comparator that compares the output voltage of the charge pump to a feedback voltage derived from the voltage across the corresponding charge pump capacitor. In response, either a constant current source or a constant current sink is coupled to the charge pump capacitor. Current sourcing or sinking continues until the voltage across the corresponding charge pump capacitor approximates a target voltage, at which point the comparator output toggles, which results in uncoupling of the coupled current source or current sink from the corresponding charge pump capacitor. Embodiments only need one current sink and one current source per charge pump capacitor, and charge balancing is independent of leakage currents.

Abstract: A linear regulator with a pass device having a first terminal, a second terminal and a drive terminal is presented. The first terminal of the pass device is coupled with the supply voltage of the linear regulator. The second terminal of the pass device is coupled with the output of the linear regulator. A driver stage is coupled with the supply voltage of the linear regulator, and the drive terminal of the pass device drives the pass device with a driving voltage. A compensating circuit compensates for a change in a voltage difference between the drive terminal of the pass device and the supply voltage of the linear regulator.

Abstract: A voltage regulator is presented. The output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits a parasitic inductance. The voltage regulator has an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator. The voltage regulator has an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage. A differential amplification stage determines the differential output voltage in dependence of the output voltage and in dependence of a reference voltage. The voltage regulator has a sensing unit to provide a load indication which is indicative of the output current and a variable impedance coupled to the intermediate node, where the variable impedance is dependent on the load indication.

Abstract: A voltage regulator is presented. The output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits a parasitic inductance. The voltage regulator has an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator. The voltage regulator has an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage. A differential amplification stage determines the differential output voltage in dependence of the output voltage and in dependence of a reference voltage. The voltage regulator has a sensing unit to provide a load indication which is indicative of the output current and a variable impedance coupled to the intermediate node, where the variable impedance is dependent on the load indication.

Abstract: A multi-stage amplifier, comprising a first amplifier stage is presented. The output of the first amplifier stage is coupled to a first terminal of a capacitor having a controllable capacitance. The input of a second amplifier stage is coupled to the output of the first amplifier stage and the first terminal of the capacitor. The output of the second amplifier stage is coupled to a second terminal of the capacitor and an output of the multi-stage amplifier. The input of a current sensing circuit is coupled with the output of the multi-stage amplifier. A control signal generator is coupled between the output of the current sensing circuit and a control terminal of the capacitor. The control signal generator provides a control signal to the capacitor in order to control or vary the capacitance of the capacitor.

Abstract: A linear regulator with a pass device having a first terminal, a second terminal and a drive terminal is presented. The first terminal of the pass device is coupled with the supply voltage of the linear regulator. The second terminal of the pass device is coupled with the output of the linear regulator. A driver stage is coupled with the supply voltage of the linear regulator, and the drive terminal of the pass device drives the pass device with a driving voltage. A compensating circuit compensates for a change in a voltage difference between the drive terminal of the pass device and the supply voltage of the linear regulator.

Abstract: A multi-stage amplifier, comprising a first amplifier stage is presented. The output of the first amplifier stage is coupled to a first terminal of a capacitor having a controllable capacitance. The input of a second amplifier stage is coupled to the output of the first amplifier stage and the first terminal of the capacitor. The output of the second amplifier stage is coupled to a second terminal of the capacitor and an output of the multi-stage amplifier. The input of a current sensing circuit is coupled with the output of the multi-stage amplifier. A control signal generator is coupled between the output of the current sensing circuit and a control terminal of the capacitor. The control signal generator provides a control signal to the capacitor in order to control or vary the capacitance of the capacitor.