Abstract: A method of performing memory mapped input output operations to an alternate address space comprising: establishing a first instruction directed to a first memory mapped input output alternate address space associated with an adapter to store data in accordance with a definition of a z/Architecture; establishing a second instruction directed to the first memory mapped input output alternate address space associated with an adapter to load data in accordance with a definition of a z/Architecture; allocating at least one of a real resource and a virtual resource associated with the first alternate address space to a process; ensuring that the selected process corresponds with the process to which the resource is allocated. The process issues at least one of the first instruction and the second instruction and thereby causes execution of at least one of the store and load with the first alternate address space.

Abstract: A method, system, and computer-usable medium for supporting debugging of host channel adapters in a logical partitioning environment. In a preferred embodiment of the present invention, a hypervisor acquires control of a trace facility and sets trace parameters for the host channel adapter. In response to determining a trace event that matches said trace parameter has been triggered, the hypervisor retrieves trace information from a buffer. In response to determining the buffer does not include any more trace information, the hypervisor determines if modification of the trace parameters is required. If the modification of the trace parameters is required, the hypervisor alters the trace parameters in anticipation of another trace event.

Abstract: Firmware of an InfiniBand (IB) host computer device provides a representation of an IB Host Channel Adapter (HCA) within the hierarchical data structure during system initialization. An ib-boot support package encapsulates arguments for booting over an IB network using an ibport device. The ib-boot support package supports use of one or more command keywords, each identifying a specific type of support package utilized to retrieve the boot image. When the srp keyword is provided, an SRP protocol is used to access the storage boot device and retrieve the boot file. Access to the boot server is thus provided via one of the support packages, and the boot image is returned to the host device via the IB network for completion of boot operations.

Abstract: A method and system that enable system firmware to efficiently boot an operating system (OS) and/or client program from a network-connected Internet Small Computer Systems Interface (iSCSI) device. The method generally comprises: (1) defining the firmware representation of the iSCSI device within the hierarchical data structure that represents the system hardware; and (2) extending the network support package to accommodate additional boot arguments that allow system firmware to acquire the information required for booting from the network-connected iSCSI device, while utilizing one of the existing discovery protocols.

Abstract: Firmware of an InfiniBand (IB) host computer device provides a representation of an IB Host Channel Adapter (HCA) within the hierarchical data structure during system initialization. An ib-boot support package encapsulates arguments for booting over an IB network using an ibport device. The ib-boot support package supports keywords identifying a network support package or a Sockets Direct Protocol (SDP) support package. When the first keyword is provided, the IPoIB network protocol is used to access the boot server and retrieve the boot file. When the second keyword is provided, the IB network boot method is implemented, whereby the SDP network protocol is used to access the boot device. Access to the boot server is thus provided via one of the support packages, and the boot image is returned to the host device via the IB network for completion of boot operations.

Abstract: Extending the network support package to accept network addresses in IPv6 format and allow the use of other boot discovery protocols, such as DHCP, to acquire the information needed to boot a system using a file on a remote server. A mechanism is added to the network support package to enable/allow the specification of additional boot discovery protocols and additional network address formats. The mechanism defines qualifier keywords that are added to the boot arguments and processed by the network support package. The qualifier keywords modify the boot arguments associated with a bootstrap method by specifying a way to acquire the arguments (i.e., a specific boot discovery protocol), the format of the arguments, and other parameters associated with the arguments. Qualifier keywords are optionally appended before the arguments. Multiple qualifier keywords may be added to the boot arguments at a time, and the keywords can be applied in their order within the arguments.

Abstract: A method, system, and computer-usable medium for supporting debugging of host channel adapters in a logical partitioning environment. In a preferred embodiment of the present invention, a hypervisor acquires control of a trace facility and sets trace parameters for the host channel adapter. In response to determining a trace event that matches said trace parameter has been triggered, the hypervisor retrieves trace information from a buffer. In response to determining the buffer does not include any more trace information, the hypervisor determines if modification of the trace parameters is required. If the modification of the trace parameters is required, the hypervisor alters the trace parameters in anticipation of another trace event.

Abstract: A method of performing memory mapped input output operations to an alternate address space comprising: establishing a first instruction directed to a first memory mapped input output alternate address space associated with an adapter to store data in accordance with a definition of a z/Architecture; establishing a second instruction directed to the first memory mapped input output alternate address space associated with an adapter to load data in accordance with the definition(s) of the z/Architecture; and wherein a process issues at least one of the first instruction and the second instruction and thereby causes execution of at least one of the store and load with the first alternate address space.

Abstract: A method of managing memory mapped input output operations to an alternate address space comprising: executing a first instruction directed to a first memory mapped input output alternate address space of a machine associated with a first adapter to allocate a resource associated with the first adapter to a process in accordance with a definition of a z/Architecture; wherein a selected process issues at least one of a load and a store instruction executed in a problem state of the machine to a selected address location of a selected resource. The method further includes ensuring that the selected resource corresponds with the allocated resource and determining that the selected process corresponds with the process to which the resource is allocated.

Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. One or more input/output subsystem images of the plurality of input/output subsystem images are managed. An aspect of this management includes managing an input/output (I/O) configuration of an input/output subsystem image. This management may be performed dynamically.

Abstract: A method for providing a message-time-ordering facility is disclosed. The method comprises initiating the message-timer ordering facility for a message at a sender system. Initiating includes setting a delay variable to zero. The message is sent to a receiver system in response to initiating the message-time-ordering facility. Sending the message includes marking the message with a first departure time-stamp responsive to a sender system clock and transmitting the message to the receiver system. The message is received at the at the receiver system, receiving includes delaying the processing of the message until the time on a receiver system clock is greater than the first departure time-stamp and recording a time associated with the delaying the processing of the message in the delay variable. A response to the message is sent to the sender system in response to receiving the message.

Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. One or more input/output subsystem images of the plurality of input/output subsystem images are managed. An aspect of this management includes managing an input/output (I/O) configuration of an input/output subsystem image. This management may be performed dynamically.

Abstract: A method for providing a message-time-ordering facility is disclosed. The method comprises initiating the message-timer ordering facility for a message at a sender system. Initiating includes setting a delay variable to zero. The message is sent to a receiver system in response to initiating the message-time-ordering facility. Sending the message includes marking the message with a first departure time-stamp responsive to a sender system clock and transmitting the message to the receiver system. The message is received at the at the receiver system, receiving includes delaying the processing of the message until the time on a receiver system clock is greater than the first departure time-stamp and recording a time associated with the delaying the processing of the message in the delay variable. A response to the message is sent to the sender system in response to receiving the message.

Abstract: An exemplary embodiment is a method for creating and identifying different kinds of groups of cooperating system images within a single machine, a single central processor complex (CPC) where each kind of group has a different functional purpose. Such a collection of cooperating system images is referred to as a logical partition cluster (LPC). An LPC is created or identified using a diagnose instruction. The diagnose instruction includes a subcode field designating a function to be performed and a logical partition cluster type field indicating the type of logical partition cluster said function is to be performed on.