Abstract: A method of the invention comprises forming a partial absorber layer (PAL) over at least one integrated transistor device formed on a semiconductor substrate, and exposing the PAL to radiant energy. A first portion of the radiant energy passes through the PAL and is absorbed in the source and drain regions adjacent a gate region of the integrated transistor device and in the semiconductor substrate underneath the field isolation regions of the integrated device. A second portion of the radiant energy is absorbed by the PAL and is thermally conducted from the PAL to the source and drain regions. The first and second portions of the radiant energy are sufficient to melt the source and drain regions to anneal the junctions of the integrated device.

Abstract: A process for fabricating a semiconductor device is enhanced by providing a plasma etching process in which exposed metal surfaces within a plasma etching chamber (24) are protected by a ceramic layer (46). In the plasma etching process, a substrate (10) is placed on a platen (26) located within a plasma etching apparatus (22). A clamping device (40) secures the perimeter of the substrate (10) to the platen (26). The clamping device (40) includes a ceramic layer (46) overlying a metal base (44). When a plasma is ignited within the etching chamber (24), the ceramic layer (46) prevents physical contact of the plasma and the metal base (44) of the clamping device (40).