Abstract: A rectifying integrator of an input signal with full output dynamics, relative to a voltage reference intermediate with respect to the dynamics of the input signal, includes a first line of integration having at least one integrator for integrating that portion of the input signal that exceeds the voltage reference, and includes a hold capacitor coupled in cascade to the integrator. The rectifying integrator includes a second line of integration, identical to the first line of integration, for integrating that portion of the input signal that remains below the voltage reference. An adder output stage generates an output signal equal to the difference between the voltages existing on the hold capacitors of the first and second lines of integration.