Patents by Inventor Carole C. Barron

Carole C. Barron has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6916669
    Abstract: A self-aligned magnetic clad bit line structure (274) for a magnetic memory element (240a) and its method of formation are disclosed, wherein the self-aligned magnetic clad bit line structure (274) extends within a trench (258) and includes a conductive material (264), magnetic cladding sidewalls (262) and a magnetic cladding cap (252). The magnetic cladding sidewalls (262) at least partially surround the conductive material (264) and the magnetic cladding cap (252) is substantially recessed within the trench with respect to the top of the trench.
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: July 12, 2005
    Inventors: Robert E. Jones, Carole C. Barron, Eric D. Luckowski, Bradley M. Melnick
  • Publication number: 20030151079
    Abstract: A self-aligned magnetic clad bit line structure (274) for a magnetic memory element (240a) and its method of formation are disclosed, wherein the self-aligned magnetic clad bit line structure (274) extends within a trench (258) and includes a conductive material (264), magnetic cladding sidewalls (262) and a magnetic cladding cap (252). The magnetic cladding sidewalls (262) at least partially surround the conductive material (264) and the magnetic cladding cap (252) is substantially recessed within the trench with respect to the top of the trench.
    Type: Application
    Filed: March 3, 2003
    Publication date: August 14, 2003
    Inventors: Robert E. Jones, Carole C. Barron, Eric D. Luckowski, Bradley M. Melnick
  • Patent number: 6555858
    Abstract: A self-aligned magnetic clad bit line structure (274) for a magnetic memory element (240a) and its method of formation are disclosed, wherein the self-aligned magnetic clad bit line structure (274) extends within a trench (258) and includes a conductive material (250), magnetic cladding sidewalls (262) and a magnetic cladding cap (252). The magnetic cladding sidewalls (262) at least partially surround the conductive material (264) and the magnetic cladding cap (252) is substantially recessed within the trench with respect to the top of the trench.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: April 29, 2003
    Assignee: Motorola, Inc.
    Inventors: Robert E. Jones, Carole C. Barron, Eric D. Luckowski, Bradley M. Melnick
  • Patent number: 5963788
    Abstract: A method is disclosed for integrating one or more microelectromechanical (MEM) devices with electronic circuitry on a common substrate. The MEM device can be fabricated within a substrate cavity and encapsulated with a sacrificial material. This allows the MEM device to be annealed and the substrate planarized prior to forming electronic circuitry on the substrate using a series of standard processing steps. After fabrication of the electronic circuitry, the electronic circuitry can be protected by a two-ply protection layer of titanium nitride (TiN) and tungsten (W) during an etch release process whereby the MEM device is released for operation by etching away a portion of a sacrificial material (e.g. silicon dioxide or a silicate glass) that encapsulates the MEM device. The etch release process is preferably performed using a mixture of hydrofluoric acid (HF) and hydrochloric acid (HCI) which reduces the time for releasing the MEM device compared to use of a buffered oxide etchant.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: October 5, 1999
    Assignee: Sandia Corporation
    Inventors: Carole C. Barron, James G. Fleming, Stephen Montague
  • Patent number: 5919548
    Abstract: A method is disclosed for micromachining recessed layers (e.g. sacrificial layers) of a microelectromechanical system (MEMS) device formed in a cavity etched into a semiconductor substrate. The method uses chemical-mechanical polishing (CMP) with a resilient polishing pad to locally planarize one or more of the recessed layers within the substrate cavity. Such local planarization using the method of the present invention is advantageous for improving the patterning of subsequently deposited layers, for eliminating mechanical interferences between functional elements (e.g. linkages) of the MEMS device, and for eliminating the formation of stringers. After the local planarization of one or more of the recessed layers, another CMP step can be provided for globally planarizing the semiconductor substrate to form a recessed MEMS device which can be integrated with electronic circuitry (e.g. CMOS, BiCMOS or bipolar circuitry) formed on the surface of the substrate.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: July 6, 1999
    Assignee: Sandia Corporation
    Inventors: Carole C. Barron, Dale L. Hetherington, Stephen Montague