Patents by Inventor Carole David

Carole David has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10134602
    Abstract: A process for smoothing a silicon-on-insulator structure comprising the exposure of a surface of the structure to an inert or reducing gas flow and to a high temperature during a heat treatment includes performing a first heat treatment step at a first temperature and under a first gas flow defined by a first flow rate, and performing a second heat treatment step at a second temperature lower than the first temperature and under a second gas flow defined by a second flow rate lower than the first flow rate.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: November 20, 2018
    Assignee: SOITEC
    Inventors: Didier Landru, Oleg Kononchuk, Carole David
  • Patent number: 9929040
    Abstract: A process is used for fabricating a final structure comprising in succession a useful semiconductor layer, a dielectric layer and a carrier substrate. The process comprises providing an intermediate structure including an upper layer, the dielectric layer and the carrier substrate, and finishing the intermediate structure to form the final structure by performing a treatment nonuniformly modifying the thickness of the dielectric layer following a predetermined dissolution profile. The dielectric layer of the intermediate structure has a thickness profile complementary to the predetermined dissolution profile.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: March 27, 2018
    Assignee: Soitec
    Inventors: Carole David, Anne-Sophie Cocchi
  • Patent number: 9875914
    Abstract: A process comprises the following steps: a) provision of a chamber suitable for receiving a plurality of structures, b) circulation of a gas stream in the chamber so that the chamber has a non-oxidizing atmosphere, c) heat treatment of the plurality of structures at a temperature above a threshold value above which the oxygen present in an oxide of a dielectric diffuses through an active layer reacts with semiconductor material of the active layer and produces a volatile material, the process being noteworthy in that the step b) is carried out so that the gas stream has a rate of circulation between the plurality of structures greater than the rate of diffusion of the volatile material into the gas stream.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: January 23, 2018
    Assignee: Soitec
    Inventors: Didier Landru, Oleg Kononchuk, Christophe Gourdel, Carole David, Sebastien Mougel, Xavier Schneider
  • Patent number: 9768057
    Abstract: A method for transferring a layer from a single-crystal substrate, called a donor substrate, onto a receiver substrate, includes supplying the single-crystal donor substrate, the substrate having a notch oriented in a first direction of the crystal and a weakness region bounding the layer to be transferred, bonding of the single-crystal donor substrate onto the receiver substrate, the main surface of the donor substrate opposite to the weakness region with respect to the layer to be transferred being at the bonding interface, and detachment of the donor substrate along the weakness region. In the method, the donor substrate has, on the main surface bonded to the receiver substrate, an array of atomic steps extending essentially in a second direction of the crystal different from the first direction.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: September 19, 2017
    Assignee: Soitec
    Inventors: Ludovic Ecarnot, Nicolas Daval, Nadia Ben Mohamed, Francois Boedt, Carole David, Isabelle Guerin
  • Publication number: 20170207101
    Abstract: A process for smoothing a silicon-on-insulator structure comprising the exposure of a surface of the structure to an inert or reducing gas flow and to a high temperature during a heat treatment includes performing a first heat treatment step at a first temperature and under a first gas flow defined by a first flow rate, and performing a second heat treatment step at a second temperature lower than the first temperature and under a second gas flow defined by a second flow rate lower than the first flow rate.
    Type: Application
    Filed: January 11, 2017
    Publication date: July 20, 2017
    Inventors: Didier Landru, Oleg Kononchuk, Carole David
  • Patent number: 9659777
    Abstract: The invention relates to a process for stabilizing a bonding interface, located within a structure for applications in the fields of electronics, optics and/or optoelectronics and that comprises an oxide layer buried between an active layer and a receiver substrate, the bonding interface having been obtained by molecular adhesion. In accordance with the invention, the process further comprises irradiating this structure with a light energy flux provided by a laser, so that the flux, directed toward the structure, is absorbed by the energy conversion layer and converted to heat in this layer, and in that this heat diffuses into the structure toward the bonding interface, so as to thus stabilize the bonding interface.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: May 23, 2017
    Assignee: Soitec
    Inventors: Didier Landru, Carole David, Ionut Radu, Lucianna Capello, Yann Sinquin
  • Publication number: 20160372342
    Abstract: A process comprises the following steps: a) provision of a chamber suitable for receiving the plurality of structures, b) circulation of a gas stream in the chamber so that the chamber has a non-oxidizing atmosphere, c) heat treatment of the plurality of structures at a temperature above a threshold value above which the oxygen present in the oxide of the dielectric diffuses through the active layer reacts with the semiconductor material of the active layer and produces a volatile material, the process being noteworthy in that the step b) is carried out so that the gas stream has a rate of circulation between the plurality of structures greater than the rate of diffusion of the volatile material into the gas stream.
    Type: Application
    Filed: June 11, 2014
    Publication date: December 22, 2016
    Inventors: Didier Landru, Oleg Kononchuk, Christophe Gourdel, Carole David, Sebastien Mougel, Xavier Schneider
  • Publication number: 20160351438
    Abstract: A method for transferring a layer from a single-crystal substrate, called a donor substrate, onto a receiver substrate, includes supplying the single-crystal donor substrate, the substrate having a notch oriented in a first direction of the crystal and a weakness region bounding the layer to be transferred, bonding of the single-crystal donor substrate onto the receiver substrate, the main surface of the donor substrate opposite to the weakness region with respect to the layer to be transferred being at the bonding interface, and detachment of the donor substrate along the weakness region. In the method, the donor substrate has, on the main surface bonded to the receiver substrate, an array of atomic steps extending essentially in a second direction of the crystal different from the first direction.
    Type: Application
    Filed: May 19, 2016
    Publication date: December 1, 2016
    Inventors: Ludovic Ecarnot, Nicolas Daval, Nadia Ben Mohamed, Francois Boedt, Carole David, Isabell Guerin
  • Publication number: 20160293476
    Abstract: A process is used for fabricating a final structure comprising in succession a useful semiconductor layer, a dielectric layer and a carrier substrate. The process comprises providing an intermediate structure including an upper layer, the dielectric layer and the carrier substrate, and finishing the intermediate structure to form the final structure by performing a treatment nonuniformly modifying the thickness of the dielectric layer following a predetermined dissolution profile. The dielectric layer of the intermediate structure has a thickness profile complementary to the predetermined dissolution profile.
    Type: Application
    Filed: March 29, 2016
    Publication date: October 6, 2016
    Inventors: Carole David, Anne-Sophie Cocchi
  • Patent number: 9425081
    Abstract: The disclosure relates to a method for implantation of atomic or ionic species into a batch of substrates made of semiconductor material, in which: each substrate made of semiconductor material is positioned on a respective support of a batch implanter, each substrate comprising a thin layer of electrical insulator on its surface; and a dose of at least one ionic or atomic species is implanted over the whole surface of the substrates, through their layer of insulator, so as to form a fragilization region within each substrate and to bound there a thin layer of semiconductor material between the thin layer of insulator and the fragilization region of the substrate, the implantation method being characterized in that, during the method, each support on which a substrate is positioned has at least two separate inclinations with respect to the plane orthogonal to the direction of implantation of the species in order to improve the implantation depth of the species in the substrate.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 23, 2016
    Assignee: SOITEC
    Inventors: Nadia Ben Mohamed, Carole David, Camille Rigal
  • Patent number: 9230848
    Abstract: Embodiments of the invention relate to a process for fabricating a silicon-on-insulator structure comprising the following steps: providing a donor substrate and a support substrate, only one of the substrates being covered with an oxide layer; forming, in the donor substrate, a weak zone; plasma activating the oxide layer; bonding the donor substrate to the support substrate in a partial vacuum; implementing a bond-strengthening anneal at a temperature of 350° C. or less causing the donor substrate to cleave along the weak zone; and carrying out a heat treatment at a temperature above 900° C. A transition from the temperature of the bond-strengthening anneal to the temperature of the heat treatment may be achieved at a ramp rate above 10° C./s.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: January 5, 2016
    Assignee: Soitec
    Inventors: Carole David, Sébastien Kerdiles
  • Publication number: 20150050797
    Abstract: The disclosure relates to a method for implantation of atomic or ionic species into a batch of substrates made of semiconductor material, in which: each substrate made of semiconductor material is positioned on a respective support of a batch implanter, each substrate comprising a thin layer of electrical insulator on its surface; and a dose of at least one ionic or atomic species is implanted over the whole surface of the substrates, through their layer of insulator, so as to form a fragilization region within each substrate and to bound there a thin layer of semiconductor material between the thin layer of insulator and the fragilization region of the substrate, the implantation method being characterized in that, during the method, each support on which a substrate is positioned has at least two separate inclinations with respect to the plane orthogonal to the direction of implantation of the species in order to improve the implantation depth of the species in the substrate.
    Type: Application
    Filed: March 14, 2013
    Publication date: February 19, 2015
    Inventors: Nadia Ben Mohamed, Carole David, Camille Rigal
  • Publication number: 20140357093
    Abstract: The invention relates to a process for stabilizing a bonding interface, located within a structure for applications in the fields of electronics, optics and/or optoelectronics and that comprises an oxide layer buried between an active layer and a receiver substrate, the bonding interface having been obtained by molecular adhesion. In accordance with the invention, the process further comprises irradiating this structure with a light energy flux provided by a laser, so that the flux, directed toward the structure, is absorbed by the energy conversion layer and converted to heat in this layer, and in that this heat diffuses into the structure toward the bonding interface, so as to thus stabilize the bonding interface.
    Type: Application
    Filed: December 13, 2012
    Publication date: December 4, 2014
    Inventors: Didier Landru, Carole David, Ionut Radu, Lucianna Capello, Yann Sinquin
  • Patent number: 8691662
    Abstract: A method for fabricating a silicon-on-insulator structure includes forming a first oxide layer on a silicon donor substrate, forming a second oxide layer on a supporting substrate, and forming a weakened zone in the donor substrate. The donor substrate is bonded to the supporting substrate by establishing direct contact between the first oxide layer on the silicon donor substrate and the second oxide layer on the supporting substrate and establishing a direct oxide-to-oxide bond therebetween. The donor substrate is split along the weakened zone to form a silicon-on-insulator structure, and the silicon-on-insulator structure is subjected to two successive rapid thermal annealing processes at temperatures T1 and T2, respectively, wherein T1 is less than or equal to T2, T1 is between 1200° C. and 1300° C., T2 is between 1240° C. and 1300° C., and when T1 is below 1240° C., then T2 is above 1240° C.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 8, 2014
    Assignee: Soitec
    Inventors: Carole David, Sébastien Kerdiles
  • Publication number: 20130273712
    Abstract: A method for fabricating a silicon-on-insulator structure includes forming a first oxide layer on a silicon donor substrate, forming a second oxide layer on a supporting substrate, and forming a weakened zone in the donor substrate. The donor substrate is bonded to the supporting substrate by establishing direct contact between the first oxide layer on the silicon donor substrate and the second oxide layer on the supporting substrate and establishing a direct oxide-to-oxide bond therebetween. The donor substrate is split along the weakened zone to form a silicon-on-insulator structure, and the silicon-on-insulator structure is subjected to two successive rapid thermal annealing processes at temperatures T1 and T2 respectively, wherein T1 is less than or equal to T2, T1 is between 1200° C. and 1300° C., T2 is between 1240° C. and 1300° C., and when T1 is below 1240° C., then T2 is above 1240° C.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 17, 2013
    Inventors: Carole David, Sébastien Kerdiles