Abstract: A smartcard receives biometric capabilities by incorporating a biometric sensor chip based on a “dual” flip chip bonding technique. In particular embodiments, the sensor chip may be incorporated into the card-type substrate after having completed any high temperature process steps required for laminating the various foil layers of the card-type substrate.

Abstract: A smartcard receives biometric capabilities by incorporating a biometric sensor chip based on a “dual” flip chip bonding technique. In particular embodiments, the sensor chip may be incorporated into the card-type substrate after having completed any high temperature process steps required for laminating the various foil layers of the card-type substrate.

Abstract: One example discloses a component carrier, including: a cavity; wherein the cavity includes a set of cavity registration features configured to engage with a set of component registration features on a component; and wherein the cavity registration features are within the cavity.

Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.

Abstract: One example discloses a component carrier, including: a cavity; wherein the cavity includes a set of cavity registration features configured to engage with a set of component registration features on a component; and wherein the cavity registration features are within the cavity.

Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.

Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.

Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.

Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.

Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.

Abstract: Consistent with an example embodiment, there is a method for manufacturing integrated circuit (IC) devices from a wafer substrate, the wafer substrate having a front-side surface with active devices and a back-side surface. A temporary covering to the front-side of the wafer substrate is applied. The back-side of the wafer substrate having a pre-grind thickness is ground to a post-grind thickness. To a predetermined thickness, the back-side of the wafer substrate is coated with a resilient coating. The wafer is mounted onto a second carrier tape on its back-side surface. After removing the temporary carrier tape from the front-side of the wafer substrate, the wafer is sawed along active device boundaries and active devices are singulated.

Abstract: Presented is an integrated circuit packaged at the wafer level wafer (also referred to as a wafer level chip scale package, WLCSP), and a method of manufacturing the same. The WLCSP comprises a die having an electrically conductive redistribution layer, RDL, formed above the upper surface of the die, the RDL defining a signal routing circuit. The method comprises the steps of: depositing the electrically conductive RDL so as to form an electrically conductive ring surrounding the signal routing circuit; and coating the side and lower surfaces of the die with an electrically conductive shielding material.

Abstract: Presented is an integrated circuit packaged at the wafer level wafer (also referred to as a wafer level chip scale package, WLCSP), and a method of manufacturing the same. The WLCSP comprises a die having an electrically conductive redistribution layer, RDL, formed above the upper surface of the die, the RDL defining a signal routing circuit. The method comprises the steps of: depositing the electrically conductive RDL so as to form an electrically conductive ring surrounding the signal routing circuit; and coating the side and lower surfaces of the die with an electrically conductive shielding material.

Abstract: Presented is an integrated circuit packaged at the wafer level wafer (also referred to as a wafer level chip scale package, WLCSP), and a method of manufacturing the same. The WLCSP comprises a die having an electrically conductive redistribution layer, RDL, formed above the upper surface of the die, the RDL defining a signal routing circuit. The method comprises the steps of: depositing the electrically conductive RDL so as to form an electrically conductive ring surrounding the signal routing circuit; and coating the side and lower surfaces of the die with an electrically conductive shielding material.