Abstract: A multiphase power converter and a corresponding method is presented. The multiphase power converter contains a first and a second constituent switched-mode power converter. The first constituent switched-mode power converter provides, both in a first mode of operation and in a second mode of operation, a first phase current to an output of the converter. The second constituent switched-mode power converter provides, in the second mode, a second phase current to the output of the converter. The converter switches, depending on an operation condition of the converter, between the first mode and the second mode. A first transconductance of the first constituent switched-mode power converter is adapted when switching between the first mode and the second mode. By adapting the first transconductance, unsteadiness of the output voltage of the converter occurring during the switching between both modes of operation is minimized.

Abstract: The proposed disclosure combines peak-mode monitoring with valley-mode control, in a Buck switching converter, by means of a peak-current sampling circuit, not to turn the high side device off, but to control a slow loop, which in turn controls a variable offset incorporated into the loop control current. This helps the loop control current define the exact peak current, regardless of what other offsets, compensation ramp or peak-to-peak current ripple, are applied to the loop control current. The peak current is determined by an operational transconductance amplifier (OTA), whose maximum current is clamped to a programmed value. The loop control current is most likely implemented using a digital successive approximation register (SAR) system, but may also be implemented using a slow analog control loop.

Abstract: The proposed disclosure combines peak-mode monitoring with valley-mode control, in a Buck switching converter, by means of a peak-current sampling circuit, not to turn the high side device off, but to control a slow loop, which in turn controls a variable offset incorporated into the loop control current. This helps the loop control current define the exact peak current, regardless of what other offsets, compensation ramp or peak-to-peak current ripple, are applied to the loop control current. The peak current is determined by an operational transconductance amplifier (OTA), whose maximum current is clamped to a programmed value. The loop control current is most likely implemented using a digital successive approximation register (SAR) system, but may also be implemented using a slow analog control loop.

Abstract: A multiphase power converter and a corresponding method is presented. The multiphase power converter contains a first and a second constituent switched-mode power converter. The first constituent switched-mode power converter provides, both in a first mode of operation and in a second mode of operation, a first phase current to an output of the converter. The second constituent switched-mode power converter provides, in the second mode, a second phase current to the output of the converter. The converter switches, depending on an operation condition of the converter, between the first mode and the second mode. A first transconductance of the first constituent switched-mode power converter is adapted when switching between the first mode and the second mode. By adapting the first transconductance, unsteadiness of the output voltage of the converter occurring during the switching between both modes of operation is minimized.

Abstract: An object of the disclosure is to provide a multiphase Buck, Boost, or other switching converter to give high efficiency over the full range of output currents, and to maximize the total output current the switching converter is able to supply, by fully utilizing every phase of the switching converter. Further, another object of this disclosure is to balance the asymmetric transconductance, such that the load share between phases is optimized for different load levels of coil value, coil type, pass-device scaling, and frequency. Still further, another object of this disclosure requires that each of the switching converter operates at a similar point of saturation current at each point along the output load range, and each phase provides a different percentage of the total output current.

Abstract: A switched mode assisted linear (SMAL) amplifier/regulator architecture can be configured to supply regulated power to a dynamic load, such as an RF power amplifier. Embodiments of a SMAL regulator can include a linear amplifier and a switched mode converter parallel coupled at a supply node, and configured such that the amplifier sets load voltage, while the amplifier and the switched converter are cooperatively controlled to supply load current. The amplifier can include separate feedback loops: an external relatively lower speed feedback loop for controlling signal path bandwidth, and an internal relatively higher speed feedback loop for controlling output impedance bandwidth of the linear amplifier. The linear amplifier can be AC coupled to the supply node, and the switched converter can be configured with a capacitive charge control loop that controls the switched converter to effectively control the amplifier to provide capacitive charge control.

Abstract: The invention relates to a locking device, in particular for a motor vehicle, having a catch mechanism and a coupling device for connecting to a motor drive. The coupling device comprises a coupling lever, which by virtue of a plurality of engagement lugs is able to pivot a coupling lever. The engagement lugs can be detected in succession by the coupling lever and are arranged in this respect one behind the other. The invention further relates to a plastics component for the locking device. An engagement lug is formed by an element protruding from a main face of the coupling lever in order to simplify production and to keep material costs and installation space to a minimum.

Abstract: The disclosed switched mode assisted linear (SMAL) amplifier/regulator architecture may be configured as a SMAL regulator to supply power to a dynamic load, such as an RF power amplifier. Embodiments of a SMAL regulator include configurations in which a linear amplifier and a switched mode converter (switcher) parallel coupled at a supply node, and configured such that the amplifier sets load voltage, while the amplifier and the switched mode converter are cooperatively controlled to supply load current. In one embodiment, the linear amplifier is AC coupled to the supply node, and the switched converter is configured with a capacitive charge control loop that controls the switched converter to effectively control the amplifier to provide capacitive charge control.

Abstract: The disclosed switched mode assisted linear (SMAL) amplifier/regulator architecture may be configured as a SMAL regulator to supply power to a dynamic load, such as an RF power amplifier. Embodiments of a SMAL regulator include configurations in which a linear amplifier and a switched mode converter (switcher) parallel coupled at a supply node, and configured such that the amplifier sets load voltage, while the amplifier and the switched mode converter are cooperatively controlled to supply load current. In one embodiment, the amplifier includes separate feedback loops: an external relatively lower speed feedback loop may be configured for controlling signal path bandwidth, and an internal relatively higher speed feedback loop may be configured for controlling output impedance bandwidth of the linear amplifier.

Abstract: The disclosed switched mode assisted linear (SMAL) amplifier/regulator architecture may be configured as a SMAL regulator to supply power to a dynamic load, such as an RF power amplifier. Embodiments of a SMAL regulator include configurations in which a linear amplifier and a switched mode converter (switcher) parallel coupled at a supply node, and configured such that the amplifier sets load voltage, while the amplifier and the switched mode converter are cooperatively controlled to supply load current. In one embodiment, the linear amplifier is AC coupled to the supply node, and the switched converter is configured with a capacitive charge control loop that controls the switched converter to effectively control the amplifier to provide capacitive charge control.

Abstract: Techniques for a receiver includes a low noise amplifier, a Q-enhanced bandpass filter on a chip, and an analog to digital converter (ADC) at a sub-sampling speed suitable for an intermediate frequency (IF) signal. In some embodiments, a temperature compensation circuit is included. The receiver has an effective noise level less than 7 dB. In some embodiments a 1-bit ADC is used. In some of these embodiments, one or more switches in the ADC are inverted to cancel charge injection.

Abstract: Techniques for a receiver includes a low noise amplifier, a Q-enhanced bandpass filter on a chip, and an analog to digital converter (ADC) at a sub-sampling speed suitable for an intermediate frequency (IF) signal. In some embodiments, a temperature compensation circuit is included. The receiver has an effective noise level less than 7 dB. In some embodiments a 1-bit ADC is used. In some of these embodiments, one or more switches in the ADC are inverted to cancel charge injection.