Patents by Inventor Carsten Schäffer
Carsten Schäffer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8884342Abstract: A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact electrode. The passivation layer includes a layer stack with an amorphous semi-insulating layer on the first surface, a first nitride layer on the amorphous semi-insulating layer, and a second nitride layer on the first nitride layer.Type: GrantFiled: August 29, 2012Date of Patent: November 11, 2014Assignee: Infineon Technologies AGInventors: Gerhard Schmidt, Josef-Georg Bauer, Carsten Schaeffer, Oliver Humbel, Angelika Koprowski, Sirinpa Monayakul
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Patent number: 8815686Abstract: A method for production of doped semiconductor regions in a semiconductor body of a lateral trench transistor includes forming a trench in the semiconductor body and introducing dopants into at least one area of the semiconductor body that is adjacent to the trench, by carrying out a process in which dopants enter the at least one area through inner walls of the trench.Type: GrantFiled: March 14, 2013Date of Patent: August 26, 2014Assignee: Infineon Technologies AGInventors: Franz Hirler, Uwe Wahl, Thorsten Meyer, Michael Rüb, Armin Willmeroth, Markus Schmitt, Carolin Tolksdorf, Carsten Schaeffer
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Publication number: 20140061733Abstract: A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact electrode. The passivation layer includes a layer stack with an amorphous semi-insulating layer on the first surface, a first nitride layer on the amorphous semi-insulating layer, and a second nitride layer on the first nitride layer.Type: ApplicationFiled: August 29, 2012Publication date: March 6, 2014Applicant: INFINEON TECHNOLOGIES AGInventors: Gerhard Schmidt, Josef-Georg Bauer, Carsten Schaeffer, Oliver Humbel, Angelika Koprowski, Sirinpa Monayakul
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Publication number: 20140015007Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.Type: ApplicationFiled: June 21, 2013Publication date: January 16, 2014Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder, Holger Schulze, Gerhard Miller
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Publication number: 20130341673Abstract: A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first conductivity type, and a drift region of the second conductivity type arranged in a semiconductor body. The first and second emitter regions are arranged between the drift region and a first electrode and are each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source region and the body region. A floating parasitic region of the first conductivity type is disposed outside the cell region.Type: ApplicationFiled: June 21, 2012Publication date: December 26, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Frank Pfirsch, Dorothea Werber, Anton Mauder, Carsten Schaeffer
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Publication number: 20130341674Abstract: A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first type, a drift region of the second conductivity type, and a first electrode. The first and second emitter regions are arranged between the drift region and first electrode and each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source and body regions. A parasitic region of the first conductivity type is disposed outside the cell region and includes at least one section with charge carrier lifetime reduction means.Type: ApplicationFiled: June 21, 2012Publication date: December 26, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder
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Patent number: 8431988Abstract: A lateral trench transistor has a semiconductor body having a source region, a source contact, a body region, a drain region, and a gate trench, in which a gate electrode which is isolated from the semiconductor body is embedded. A heavily doped semiconductor region is provided within the body region or adjacent to it, and is electrically connected to the source contact, and whose dopant type corresponds to that of the body region.Type: GrantFiled: October 28, 2005Date of Patent: April 30, 2013Assignee: Infineon Technologies AGInventors: Franz Hirler, Uwe Wahl, Thorsten Meyer, Michael Rüb, Armin Willmeroth, Markus Schmitt, Carolin Tolksdorf, Carsten Schäffer
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Patent number: 8367532Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.Type: GrantFiled: July 26, 2012Date of Patent: February 5, 2013Assignee: Infineon Technologies AGInventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schäffer, Franz-Josef Niedernostheide
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Publication number: 20120315747Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.Type: ApplicationFiled: July 26, 2012Publication date: December 13, 2012Inventors: Anton MAUDER, Hans-Joachim SCHULZE, Frank HILLE, Holger SCHULZE, Manfred PFAFFENLEHNER, Carsten SCHÄFFER, Franz-Josef NIEDERNOSTHEIDE
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Patent number: 8304305Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.Type: GrantFiled: June 8, 2011Date of Patent: November 6, 2012Assignee: Infineon Technologies Austria AGInventors: Davide Chiola, Carsten Schaeffer
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Patent number: 8252671Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.Type: GrantFiled: July 20, 2011Date of Patent: August 28, 2012Assignee: Infineon Technologies Austria AGInventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schaeffer, Franz-Josef Niedernostheide
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Publication number: 20110275202Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.Type: ApplicationFiled: July 20, 2011Publication date: November 10, 2011Inventors: Anton MAUDER, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schäffer, Franz-Josef Niedernostheide
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Publication number: 20110233728Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.Type: ApplicationFiled: June 8, 2011Publication date: September 29, 2011Applicant: Infineon Technologies Austria AGInventors: Davide CHIOLA, Carsten SCHAEFFER
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Patent number: 8003502Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.Type: GrantFiled: April 2, 2009Date of Patent: August 23, 2011Assignee: Infineon Technologies Austria AGInventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schaeffer, Franz-Josef Niedernostheide
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Patent number: 8003456Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.Type: GrantFiled: June 25, 2008Date of Patent: August 23, 2011Assignee: Infineon Technologies Austria AGInventors: Davide Chiola, Carsten Schaeffer
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Patent number: 7880200Abstract: A semiconductor device and production method is disclosed. In one embodiment, the semiconductor device includes a first electrode and a second electrode, located on surfaces of a semiconductor body, and an insulated gate electrode. The semiconductor body has a contact groove for the first electrode in an intermediate oxide layer. Highly doped zones of a first conduction type are located in edge regions of the source connection zone. Below the highly doped zones of the first conduction type, there are highly doped zones of a body zone with a complementary conduction type. In a central region of the source connection zone, the body zone has a net charge carrier concentration with a complementary conduction type which is lower than the charge carrier concentration in the edge regions of the source connection zone.Type: GrantFiled: September 28, 2007Date of Patent: February 1, 2011Assignee: Infineon Technologies Austria AGInventors: Frank Hille, Carsten Schaeffer, Frank Pfirsch, Holger Ruething
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Patent number: 7538412Abstract: A semiconductor device includes a semiconductor material, the semiconductor material including a base region and a field stop zone including a first side adjacent the base region and a second side opposite the first side. The field stop zone includes a first dopant implant and a second dopant implant. The first dopant implant has a first dopant concentration maximum and the second dopant implant has a second dopant concentration maximum with the first dopant concentration maximum being less than the second dopant concentration maximum, and being located closer to the second side than the second dopant concentration maximum.Type: GrantFiled: June 30, 2006Date of Patent: May 26, 2009Assignee: Infineon Technologies Austria AGInventors: Hans-Joachim Schulze, Franz-Josef Niedernostheide, Helmut Strack, Carsten Schaeffer, Frank Pfirsch
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Patent number: 7514750Abstract: A semiconductor device according to the invention has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.Type: GrantFiled: September 30, 2005Date of Patent: April 7, 2009Assignee: Infineon Technologies AGInventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schäffer, Franz-Josef Niedernostheide
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Publication number: 20090085103Abstract: A semiconductor device and production method is disclosed. In one embodiment, the semiconductor device includes a first electrode and a second electrode, located on surfaces of a semiconductor body, and an insulated gate electrode. The semiconductor body has a contact groove for the first electrode in an intermediate oxide layer. Highly doped zones of a first conduction type are located in edge regions of the source connection zone. Below the highly doped zones of the first conduction type, there are highly doped zones of a body zone with a complementary conduction type. In a central region of the source connection zone, the body zone has a net charge carrier concentration with a complementary conduction type which is lower than the charge carrier concentration in the edge regions of the source connection zone.Type: ApplicationFiled: September 28, 2007Publication date: April 2, 2009Applicant: Infineon Technologies Austria AGInventors: Frank Hille, Carsten Schaeffer, Frank Pfirsch, Holger Ruething
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Publication number: 20080315363Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.Type: ApplicationFiled: June 25, 2008Publication date: December 25, 2008Applicant: Infineon Technologies Austria AGInventors: DAVIDE CHIOLA, Carsten Schaeffer