Abstract: A method of digital radio communication between a first device and a second device is disclosed. An advertising packet is transmitted between first and second devices, wherein the packet includes a first address and a data portion. Additionally, an encryption key is transmitted between the devices. The first device generates a second address by encrypting an identity value derived from part of the first address using the encryption key and the data portion. The result is encrypted to generate second portion of the second address. The first device then transmits a connection request including the second address. The second device decrypts the second portion and uses the encryption key to determine correspondence with the first portion. If said correspondence is determined, the second device decrypts the first portion using at least the encryption key and compares it to an expected identity value derived from the first address.

Abstract: According to an aspect, there is provided a first radio device for performing the following. The first radio device causes wireless transmission of one or more first advertising messages at one or more advertising radio frequencies using a connectionless mode of the first radio device. The radio device receives, for at least one first advertising message, a first scan request from a second radio device and transmits, for each first scan request, a first scan response to the second radio device. Based on one or more received first scan requests, the first radio device performs bi-directional channel sounding with the second radio device at one or more sounding radio frequencies. The first radio device receives, from the second radio device, at least one first message comprising information on second channel sounding measurements and transmits. to the second radio device, at least one second message comprising information on first channel sounding measurements performed by the first radio device.

Abstract: There is disclosed an electronic device and a method of operating an electronic device. It has peripherals which each have one or more event outputs or task inputs, connected to a peripheral interconnect. The device also has a controller for configuring the peripheral interconnect and a memory, which are communicatively coupled to a bus system. The peripheral interconnect receives configuration data from the controller, which selectively connects peripheral event outputs and task inputs. The controller uses the bus system to access a sequence of instructions in a script stored in the memory. Each instruction in the sequence identifies a peripheral task input, event output and a second peripheral event output. Each subsequent instruction in the sequence is implemented in response to detecting an event signalled from the second peripheral event output identified by the preceding instruction in the sequence.

Abstract: A method of determining a distance between a radio frequency device and a target is disclosed in which the radio frequency device receives a radio frequency signal from the target. The method comprises determining a time domain channel response from the received radio frequency signal, determining an amplitude of a largest peak in the time domain channel response, determining an amplitude of a second, earlier, peak in the time domain channel response, comparing the second peak amplitude to a threshold based on the largest peak amplitude, identifying the largest peak as a shortest path peak if the second peak amplitude is less than the threshold, identifying the second peak as a shortest path peak if the second peak amplitude is greater than the threshold, and calculating the distance between the radio frequency device and the target based on a time corresponding to the shortest path peak.

Abstract: A power supply circuit portion for supplying power comprises a first power rail, a second power rail, first and second output terminals, an energy storage device connected in parallel with the first and second output terminals; and first and second switching portions. The power supply circuit portion has a first mode in which power is supplied to the first and second output terminals by the first and second power rails, and a second mode in which the first switching portion is arranged such that power is not supplied to the first and second output terminals and the second switching portion is arranged to disconnect the energy storage device from the first power rail.

Abstract: A method of determining a distance between a radio frequency device and a target is disclosed in which the radio frequency device receives a radio frequency signal from the target. The method comprises determining a time domain channel response from the received radio frequency signal, determining an amplitude of a largest peak in the time domain channel response, determining an amplitude of a second, earlier, peak in the time domain channel response, comparing the second peak amplitude to a threshold based on the largest peak amplitude, identifying the largest peak as a shortest path peak if the second peak amplitude is less than the threshold, identifying the second peak as a shortest path peak if the second peak amplitude is greater than the threshold, and calculating the distance between the radio frequency device and the target based on a time corresponding to the shortest path peak.

Abstract: A method of digital radio communication between a first device and a second device is disclosed. An advertising packet is transmitted between first and second devices, wherein the packet includes a first address and a data portion. Additionally, an encryption key is transmitted between the devices. The first device generates a second address by encrypting an identity value derived from part of the first address using the encryption key and the data portion. The result is encrypted to generate second portion of the second address. The first device then transmits a connection request including the second address. The second device decrypts the second portion and uses the encryption key to determine correspondence with the first portion. If said correspondence is determined, the second device decrypts the first portion using at least the encryption key and compares it to an expected identity value derived from the first address.

Abstract: A power supply circuit portion for supplying power comprises a first power rail, a second power rail, first and second output terminals, an energy storage device connected in parallel with the first and second output terminals; and first and second switching portions. The power supply circuit portion has a first mode in which power is supplied to the first and second output terminals by the first and second power rails, and a second mode in which the first switching portion is arranged such that power is not supplied to the first and second output terminals and the second switching portion is arranged to disconnect the energy storage device from the first power rail.

Abstract: A semiconductor integrated circuit device comprises at least first and second circuits said first and second circuits being connected to a shared external connection. The device further comprises a voltage clamp that is operable to limit a voltage at the shared external connection. The voltage clamp can be selectively enabled depending upon whether the first or second circuit is being used.

Abstract: A voltage reference circuit comprises a voltage-controlled current source; a first reference metal-oxide-semiconductor field-effect transistor having a first threshold voltage; a second reference metal-oxide-semiconductor field-effect transistor having a second threshold voltage, wherein the second threshold voltage is different to the first threshold voltage; a current mirror; and a load. The voltage-controlled current source is arranged to generate a first current proportional to a difference between the first and second threshold voltages, and the current mirror is arranged to generate a second current that is a scaled version of the first current through the load so as to produce a reference voltage.

Abstract: A semiconductor integrated circuit device comprises at least first and second circuits said first and second circuits being connected to a shared external connection. The device further comprises a voltage clamp that is operable to limit a voltage at the shared external connection. The voltage clamp can be selectively enabled depending upon whether the first or second circuit is being used.

Abstract: An integrated power-on reset circuit comprises a resistor and a capacitor, wherein the resistor is arranged to pass a current by quantum tunneling in order to charge the capacitor.

Abstract: An integrated-circuit, continuous-time, sigma-delta analog-to-digital converter has a single-ended analog input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analog input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input.

Abstract: An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input.

Abstract: An integrated power-on reset circuit comprises a resistor and a capacitor, wherein the resistor is arranged to pass a current by quantum tunneling in order to charge the capacitor.

Abstract: An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input.

Abstract: An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input.