Patents by Inventor Carter EDWARDS

Carter EDWARDS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240168763
    Abstract: Apparatuses, systems, and techniques to perform computational operations in response to one or more compute uniform device architecture (CUDA) programs. In at least one embodiment, one or more computational operations are to cause two or more other computational operations to be performed by two or more streaming multiprocessors (SMs).
    Type: Application
    Filed: November 30, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Kyrylo Perelygin, Maciej Tyrlik, Gokul Ramaswamy Hirisave Chandra Shekhara, Balaji Krishna Yugandhar Atukuri, Rishkul Kulkarni, Konstantinos Kyriakopoulos, Edward H. Gornish, David Allan Berson, Bageshri Sathe, James Player, Aman Arora, Alan Kaatz, Andrew Kerr, Haicheng Wu, Cris Cecka, Vijay Thakkar, Sean Treichler, Jack H. Choquette, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Cody Addison, Girish Bhaskarrao Bharambe
  • Publication number: 20240169469
    Abstract: Apparatuses, systems, and techniques to transform information corresponding to one or more memory transactions. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause information corresponding to one or more memory transactions resulting from performance of the API to be transformed.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Aditya Avinash Atluri, Apoorv Parle, Chao Li, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240169022
    Abstract: Apparatuses, systems, and techniques to perform computational operations in response to one or more compute uniform device architecture (CUDA) programs. In at least one embodiment, one or more computational operations are to cause one or more other computational operations to wait until matrix multiply-accumulate (MMA) memory transactions are performed.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Kyrylo Perelygin, Maciej Tyrlik, Gokul Ramaswamy Hirisave Chandra Shekhara, Balaji Krishna Yugandhar Atukuri, Rishkul Kulkarni, Konstantinos Kyriakopoulos, Edward H. Gornish, David Allan Berson, Bageshri Sathe, James Player, Aman Arora, Alan Kaatz, Andrew Kerr, Haicheng Wu, Cris Cecka, Vijay Thakkar, Sean Treichler, Jack H. Choquette, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Cody Addison, Girish Bhaskarrao Bharambe
  • Publication number: 20240168632
    Abstract: Apparatuses, systems, and techniques to facilitate asynchronous data movement accounting. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause one or more memory transactions to be performed without storing information about the one or more memory transactions.
    Type: Application
    Filed: December 14, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Olivier Giroux, Jack H. Choquette, Gokul Ramaswamy Hirisave Chandra Shekhara, Rui Guo, Chao Li, Vishalkumar Ketankumar Mehta, David Dastous St. Hilaire, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Subhasmita Chakraborty, Vikram Dhar
  • Publication number: 20240168765
    Abstract: Apparatuses, systems, and techniques to perform a tensor prefetch instruction to cause one or more tensors to be stored into one or more caches. In at least one embodiment, one or more circuits of a GPU are to perform a tensor prefetch instruction to cause one or more tensors to be stored into one or more GPU caches.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240169472
    Abstract: Apparatuses, systems, and techniques to perform a tensor prefetch instruction to cause one or more tensors to be transformed and stored into one or more caches. In at least one embodiment, one or more circuits of a GPU are to perform a tensor prefetch instruction to cause one or more tensors to be transformed and stored into one or more GPU caches.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240168829
    Abstract: Apparatuses, systems, and techniques to generate a tensor mapping. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause a mapping from a first tensor to a second tensor to be generated.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Vishalkumar Ketankumar Mehta, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240169471
    Abstract: Apparatuses, systems, and techniques to perform a graphics processing unit (GPU) prefetch instruction to cause a variable amount of information to be stored into one or more GPU caches. In at least one embodiment, one or more circuits of a GPU are to perform a GPU prefetch instruction to cause a variable amount of information to be stored into one or more GPU caches.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240168794
    Abstract: Apparatuses, systems, and techniques to store memory transaction information. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause information received by the API about one or more memory transactions to be stored.
    Type: Application
    Filed: December 14, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Olivier Giroux, Jack H. Choquette, Gokul Ramaswamy Hirisave Chandra Shekhara, Rui Guo, Chao Li, Vishalkumar Ketankumar Mehta, David Dastous St. Hilaire, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Subhasmita Chakraborty, Vikram Dhar
  • Publication number: 20240168659
    Abstract: Apparatuses, systems, and techniques to transform and store information corresponding to one or more memory transactions. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause information corresponding to one or more memory transactions resulting from performance of the API to be transformed and stored.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Aditya Avinash Atluri, Apoorv Parle, Chao Li, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240169468
    Abstract: Apparatuses, systems, and techniques to cause information to be provided. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause an amount of information to be accessed as a result of one or more memory transactions to be provided to one or more users.
    Type: Application
    Filed: December 14, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Olivier Giroux, Jack H. Choquette, Gokul Ramaswamy Hirisave Chandra Shekhara, Rui Guo, Chao Li, Vishalkumar Ketankumar Mehta, David Dastous St. Hilaire, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Subhasmita Chakraborty, Vikram Dhar
  • Publication number: 20240169470
    Abstract: Apparatuses, systems, and techniques to store information in a plurality of storage locations allocated to a graphics processing unit (GPU). In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause information to be stored in a plurality of storage locations allocated to a first GPU.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Vishalkumar Ketankumar Mehta, Aditya Avinash Atluri, Apoorv Parle, Chao Li, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240169467
    Abstract: Apparatuses, systems, and techniques to create one or more memory transaction software objects. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause one or more software objects to indicate whether one or more memory transactions have been performed.
    Type: Application
    Filed: December 14, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Olivier Giroux, Jack H. Choquette, Gokul Ramaswamy Hirisave Chandra Shekhara, Rui Guo, Chao Li, Vishalkumar Ketankumar Mehta, David Dastous St. Hilaire, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Subhasmita Chakraborty, Vikram Dhar
  • Publication number: 20240169023
    Abstract: Apparatuses, systems, and techniques to perform computational operations in response to one or more compute uniform device architecture (CUDA) programs. In at least one embodiment, one or more computational operations are to indicate whether matrix multiply-accumulate (MMA) memory operations are complete.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Kyrylo Perelygin, Maciej Tyrlik, Gokul Ramaswamy Hirisave Chandra Shekhara, Balaji Krishna Yugandhar Atukuri, Rishkul Kulkarni, Konstantinos Kyriakopoulos, Edward H. Gornish, David Allan Berson, Bageshri Sathe, James Player, Aman Arora, Alan Kaatz, Andrew Kerr, Haicheng Wu, Cris Cecka, Vijay Thakkar, Sean Treichler, Jack H. Choquette, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Cody Addison, Girish Bhaskarrao Bharambe
  • Publication number: 20240168831
    Abstract: Apparatuses, systems, and techniques to cause a first tensor to be translated into a second tensor according to a tensor map. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause a first tensor to be translated into a second tensor according to a tensor map.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Aditya Avinash Atluri, Apoorv Parle, Chao Li, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240168762
    Abstract: Apparatuses, systems, and techniques to perform computational operations in response to one or more compute uniform device architecture (CUDA) programs. In at least one embodiment, one or more computational operations are to cause one or more other computational operations to wait until a portion of matrix multiply-accumulate (MMA) operations have been performed.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Kyrylo Perelygin, Maciej Tyrlik, Gokul Ramaswamy Hirisave Chandra Shekhara, Balaji Krishna Yugandhar Atukuri, Rishkul Kulkarni, Konstantinos Kyriakopoulos, Edward H. Gornish, David Allan Berson, Bageshri Sathe, James Player, Aman Arora, Alan Kaatz, Andrew Kerr, Haicheng Wu, Cris Cecka, Vijay Thakkar, Sean Treichler, Jack H. Choquette, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Cody Addison, Girish Bhaskarrao Bharambe
  • Publication number: 20240168795
    Abstract: Apparatuses, systems, and techniques to perform delayed memory transaction information check. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to check for information provided by one or more users about one or more memory transactions after a timeout event indicated by one or more users.
    Type: Application
    Filed: December 14, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Olivier Giroux, Jack H. Choquette, Gokul Ramaswamy Hirisave Chandra Shekhara, Rui Guo, Chao Li, Vishalkumar Ketankumar Mehta, David Dastous St. Hilaire, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Subhasmita Chakraborty, Vikram Dhar
  • Publication number: 20240168830
    Abstract: Apparatuses, systems, and techniques to indicate storage locations of information to be mapped from a first tensor to a second tensor. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to indicate one or more storage locations of information to be mapped from a first tensor to a second tensor.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 23, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Aditya Avinash Atluri, Apoorv Parle, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240161223
    Abstract: Apparatuses, systems, and techniques to cause a first tensor to be translated into a second tensor according to a tensor map. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause a first tensor to be translated into a second tensor according to a tensor map.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 16, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Vishalkumar Ketankumar Mehta, Aditya Avinash Atluri, Apoorv Parle, Chao Li, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette
  • Publication number: 20240161224
    Abstract: Apparatuses, systems, and techniques to cause a first tensor to be translated into a second tensor according to a tensor map without storing information about a memory transaction corresponding to the translation. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause a first tensor to be translated into a second tensor according to a tensor map without storing information about one or more memory transactions corresponding to the translation.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 16, 2024
    Inventors: Harold Carter Edwards, Stephen Anthony Bernard Jones, Alexander Lev Minkin, Olivier Giroux, Gokul Ramaswamy Hirisave Chandra Shekhara, Vishalkumar Ketankumar Mehta, Aditya Avinash Atluri, Apoorv Parle, Chao Li, Ronny Meir Krashinsky, Alan Kaatz, Andrew Robert Kerr, Jack H. Choquette