Patents by Inventor Cary Gunn
Cary Gunn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220042920Abstract: Apparatus, sensor chips and techniques for optical sensing of substances by using optical sensors on sensor chips.Type: ApplicationFiled: June 21, 2021Publication date: February 10, 2022Inventors: Lawrence Cary Gunn, III, Muzammil Iqbal, Brad Spaugh, Frank Tybor
-
Publication number: 20210396755Abstract: Disclosed herein are methods of performing multiplexed serological immunoassays to detect multiple antigens in parallel to determine if a patient has an infection or an immune disorder. Use of multiple antigens in parallel increases specificity and/or sensitivity towards assaying the infection or immune disorder. The infection may be a viral infection such as a SARS-CoV-2 viral infection, a variant of a SARS-CoV-2 viral infection, or a non-SARS-CoV-2 coronavirus infection. Also disclosed herein are methods of performing the multiplexed serological immunoassays on an optical ring resonator substrate. Also disclosed herein are methods of detecting antibodies specific for an antigen that belong to more than one immunoglobulin type.Type: ApplicationFiled: April 1, 2021Publication date: December 23, 2021Inventors: Lawrence Cary Gunn, III, Richard Deane Hockett, JR., Sasi Mudumba
-
Patent number: 11041811Abstract: Apparatus, sensor chips and techniques for optical sensing of substances by using optical sensors on sensor chips.Type: GrantFiled: December 15, 2017Date of Patent: June 22, 2021Assignee: GENALYTE, INC.Inventors: Lawrence Cary Gunn, III, Muzammil Iqbal, Brad Spaugh, Frank Tybor
-
Publication number: 20200096451Abstract: Techniques, apparatus and systems are described for performing label-free monitoring of processes. In one aspect, a label-free monitoring system includes an array of label-free optical sensors to detect an optical signal in response to synthesis of one or more target genetic structures. Each label-free optical sensor is functionalized with a respective target genetic structure. The system also includes a fluid flow control module that includes fluid receiving units to provide paths for different fluids to flow into the fluid flow control module and at least one switch connected to the fluid receiving units to selectively switch among the fluid receiving units to receive a select sequence of the fluids through the fluid receiving units. The select sequence of the fluids includes at least a dNTP or base.Type: ApplicationFiled: July 29, 2019Publication date: March 26, 2020Inventor: Lawrence Cary Gunn, III
-
Patent number: 10365224Abstract: Techniques, apparatus and systems are described for performing label-free monitoring of processes. In one aspect, a label-free monitoring system includes an array of label-free optical sensors to detect an optical signal in response to synthesis of one or more target genetic structures. Each label-free optical sensor is functionalized with a respective target genetic structure. The system also includes a fluid flow control module that includes fluid receiving units to provide paths for different fluids to flow into the fluid flow control module and at least one switch connected to the fluid receiving units to selectively switch among the fluid receiving units to receive a select sequence of the fluids through the fluid receiving units. The select sequence of the fluids includes at least a dNTP or base.Type: GrantFiled: December 8, 2008Date of Patent: July 30, 2019Assignee: GENALYTE, INC.Inventor: Lawrence Cary Gunn, III
-
Publication number: 20180202937Abstract: Apparatus, sensor chips and techniques for optical sensing of substances by using optical sensors on sensor chips.Type: ApplicationFiled: December 15, 2017Publication date: July 19, 2018Inventors: Lawrence Cary Gunn, III, Muzammil Iqbal, Brad Spaugh, Frank Tybor
-
Patent number: 9846126Abstract: Apparatus, sensor chips and techniques for optical sensing of substances by using optical sensors on sensor chips.Type: GrantFiled: October 27, 2009Date of Patent: December 19, 2017Assignee: Genalyte, Inc.Inventors: Lawrence Cary Gunn, III, Muzammil Iqbal, Brad Spaugh, Frank Tybor
-
Publication number: 20120092650Abstract: Apparatus, sensor chips and techniques for optical sensing of substances by using optical sensors on sensor chips.Type: ApplicationFiled: October 27, 2009Publication date: April 19, 2012Applicant: GENALYTE, INC.Inventors: Lawrence Cary Gunn, III, Muzummil Iqbal
-
Publication number: 20110045472Abstract: Techniques, apparatus and systems are described for performing label-free monitoring of processes. In one aspect, a label-free monitoring system includes an array of label-free optical sensors to detect an optical signal in response to synthesis of one or more target genetic structures. Each label-free optical sensor is functionalized with a respective target genetic structure. The system also includes a fluid flow control module that includes fluid receiving units to provide paths for different fluids to flow into the fluid flow control module and at least one switch connected to the fluid receiving units to selectively switch among the fluid receiving units to receive a select sequence of the fluids through the fluid receiving units. The select sequence of the fluids includes at least a dNTP or base.Type: ApplicationFiled: December 8, 2008Publication date: February 24, 2011Inventor: Lawrence Cary Gunn III
-
Patent number: 7826688Abstract: Embodiments of the inventions described herein comprise a device and method for manipulating an optical beam. The method comprises propagating an optical beam through a waveguide in proximity to a resonant cavity and pumping the resonant cavity with sufficient optical power to induce non-linearities in the refractive index of the resonant cavity. The method further comprises tuning the resonant frequency band of the resonant cavity with a modulation signal such that the optical beam is manipulated in a useful way.Type: GrantFiled: October 20, 2006Date of Patent: November 2, 2010Assignee: Luxtera, Inc.Inventors: Thiruvikraman Sadagopan, Roger Koumans, Thierry Pinguet, Lawrence Cary Gunn, III
-
Patent number: 7358527Abstract: Systems and methods are disclosed for a test device that is configured to allow assessment of the quality of germanium devices. In one embodiment, the test device is formed on the same substrate as the germanium devices, and includes a plurality of germanium components that are substantially similar to those found in the germanium devices. Such example measurement can used to estimate various quality parameters associated with fabrication of the germanium devices.Type: GrantFiled: February 3, 2006Date of Patent: April 15, 2008Assignee: Luxtera, Inc.Inventors: Gianlorenzo Masini, Cary Gunn
-
Patent number: 7309628Abstract: A semiconductor device is formed as part of an integrated circuit. The semiconductor device, which is formed in an active semiconductor layer, is surrounded by a guardian that provides a diffusion barrier against contaminants and also provides assistance in avoiding dishing above the semiconductor device during chemical mechanical polishing. The dielectric that is above the semiconductor device and inside the guardian is etched to form an opening that receives one of an optical fiber, an electromagnetic signal source, or an electromagnetic signal load. The remaining dielectric is in layers that are of substantially uniform thickness. The guardian is built up in layers that are part of a normal integrated circuit process. These include contact layers, via layers, and interconnect layers.Type: GrantFiled: November 15, 2004Date of Patent: December 18, 2007Inventors: Omar Zia, Hsiao-Hui Chen, Lawrence Cary Gunn, III
-
Patent number: 7169654Abstract: A method of integrating a non-MOS transistor device and a CMOS electronic device on a semiconductor substrate includes forming openings within an active semiconductor layer in first and second regions of a semiconductor substrate. The first region corresponds to a non-MOS transistor device portion and the second region corresponds to a CMOS electronic device portion. The openings are formed using a dual trench process, forming openings or shallow trenches in the non-MOS transistor device portion to a first depth, and openings in the CMOS electronic device portion to a second depth greater than the first depth.Type: GrantFiled: November 15, 2004Date of Patent: January 30, 2007Assignee: Freescale Semiconductor, Inc.Inventors: Omar Zia, Lawrence Cary Gunn, III
-
Patent number: 7167606Abstract: A strip loaded waveguide comprises a slab and a strip, wherein the strip is separated from the slab. Nevertheless, a guiding region is provided for propagating an optical mode and this guiding region extends both within the strip and the slab. A layer of material having an index of refraction lower than that of the strip and the slab may be disposedbetween and separate the strip and the slab. In one embodiment, the slab comprises a crystalline silicon, the strip comprises polysilicon or crystalline silicon, and the layer of material therebetween comprises silicon dioxide. Such waveguides may be formed on the same substrate with transistors. These waveguides may also be electrically biased to alter the indexof refraction and/or absorption of the waveguide.Type: GrantFiled: March 28, 2005Date of Patent: January 23, 2007Assignee: California Institute of TechnologyInventors: Lawrence Cary Gunn, III, Axel Scherer
-
Patent number: 7164821Abstract: The index of refraction of waveguide structures can be varied by altering carrier concentration. The waveguides preferably comprise semiconductors like silicon that are substantially optically transmissive at certain wavelengths. Variation of the carrier density in these semiconductors may be effectuated by inducing an electric field within the semiconductor for example by apply a voltage to electrodes associated with the semiconductor. Variable control of the index of refraction may be used to implement a variety of functionalites including, but not limited to, tunable waveguide gratings and resonant cavities, switchable couplers, modulators, and optical switches.Type: GrantFiled: November 5, 2004Date of Patent: January 16, 2007Assignee: California Institute of TechnologyInventor: Lawrence Cary Gunn, III
-
Patent number: 7127147Abstract: A strip loaded waveguide comprises a slab and a strip, wherein the strip is separated from the slab. Nevertheless, a guiding region is provided for propagating an optical mode and this guiding region extends both within the strip and the slab. A layer of material having an index of refraction lower than that of the strip and the slab may be disposed between and separate the strip and the slab. In one embodiment, the slab comprises a crystalline silicon, the strip comprises polysilicon or crystalline silicon, and the layer of material therebetween comprises silicon dioxide. Such waveguides may be formed on the same substrate with transistors. These waveguides may also be electrically biased to alter the index of refraction and/or absorption of the waveguide.Type: GrantFiled: November 11, 2004Date of Patent: October 24, 2006Assignee: California Institute of TechnologyInventors: Lawrence Cary Gunn, III, Axel Scherer
-
Patent number: 7120338Abstract: The index of refraction of waveguide structures can be varied by altering carrier concentration. The waveguides preferably comprise semiconductors like silicon that are substantially optically transmissive at certain wavelengths. Variation of the carrier density in these semiconductors may be effectuated by inducing an electric field within the semiconductor for example by apply a voltage to electrodes associated with the semiconductor. Variable control of the index of refraction may be used to implement a variety of functionalites including, but not limited to, tunable waveguide gratings and resonant cavities, switchable couplers, modulators, and optical switches.Type: GrantFiled: September 10, 2002Date of Patent: October 10, 2006Assignee: California Institute of TechnologyInventor: Lawrence Cary Gunn, III
-
Patent number: 7098090Abstract: A method for integrating first and second type devices on a semiconductor substrate includes forming openings within an active semiconductor layer of a dual semiconductor-on-insulator in first and second regions of the semiconductor substrate. First and second non-MOS transistor device implant regions are formed within portions of an intermediate semiconductor layer underlying first and second openings, respectively, in a first device portion, filled with a fill material and planarized. A top surface portion of the active semiconductor layer disposed in-between the first and second openings is exposed, first and second low dose non-MOS transistor device well regions are formed in respective first and second portions of the intermediate semiconductor layer underlying a region in-between the first and second openings.Type: GrantFiled: November 15, 2004Date of Patent: August 29, 2006Assignee: Freescale Semiconductor, Inc.Inventors: Omar Zia, Lawrence Cary Gunn, III
-
Patent number: 7082235Abstract: A strip loaded waveguide comprises a slab and a strip, wherein the strip is separated from the slab. Nevertheless, a guiding region is provided for propagating an optical mode and this guiding region extends both within the strip and the slab. A layer of material having an index of refraction lower than that of the strip and the slab may be disposed between and separate the strip and the slab. In one embodiment, the slab comprises a crystalline silicon, the strip comprises polysilicon or crystalline silicon, and the layer of material therebetween comprises silicon dioxide. Such waveguides may be formed on the same substrate with transistors. These waveguides may also be electrically biased to alter the index of refraction and/or absorption of the waveguide.Type: GrantFiled: September 10, 2002Date of Patent: July 25, 2006Assignee: California Institute of TechnologyInventor: Lawrence Cary Gunn, III
-
Patent number: 7067342Abstract: A semiconductor structure has a waveguide a transistor on the same integrated circuit. One trench isolation technique is used for defining a transistor region and another is used for optimizing a lateral boundary of the waveguide. Both the waveguide and the transistor have trenches with liners that can be separately optimized. The transistor has a salicide for source/drain contacts. During this process, a salicide block is used over the waveguide to prevent salicide formation in unwanted areas of the waveguide. The depth of the trench for the waveguide can be lower than that of the trench for the transistor isolation. Trench isolation depth can be set by an etch stop region that can be either a thin oxide layer or a buffer layer that is selectively etchable with respect to the top semiconductor layer and that can be used as a seed layer for growing the top semiconductor layer.Type: GrantFiled: November 15, 2004Date of Patent: June 27, 2006Assignee: Freescale Semiconductor, Inc.Inventors: Omar Zia, Nigel G. Cave, Lawrence Cary Gunn, III