Patents by Inventor Cary Kiest

Cary Kiest has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9310248
    Abstract: A monitoring system for a multi-laser module includes detectors corresponding to each laser and situated to receive a portion of the associated laser beam uncombined with other beams. Laser characteristics are measured and stored, and in operation are used to identify device failures. A comparator receives a reference value and compares the reference value with a current operational value. If the current value is less that the reference value, a possible failure is indicated. Signal cross-coupling among the detectors is also used to identify undesirable scattering that can be associated with surface contamination or device failure.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 12, 2016
    Assignee: nLIGHT, Inc.
    Inventors: Scott R. Karlsen, Jay Small, Mitch Stanek, Vito Errico, Cary Kiest
  • Publication number: 20140263971
    Abstract: A monitoring system for a multi-laser module includes detectors corresponding to each laser and situated to receive a portion of the associated laser beam uncombined with other beams. Laser characteristics are measured and stored, and in operation are used to identify device failures. A comparator receives a reference value and compares the reference value with a current operational value. If the current value is less that the reference value, a possible failure is indicated. Signal cross-coupling among the detectors is also used to identify undesirable scattering that can be associated with surface contamination or device failure.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: nLight Photonics Corporation
    Inventors: Scott R. Karlsen, Jay Small, Mitch Stanek, Vito Errico, Cary Kiest
  • Publication number: 20030025517
    Abstract: An alignment technique can be used to align a semiconductor wafer during wafer testing. During a gross alignment process, a bump pattern on the wafer surface is located. Based on a known relative location relationship between the bump pattern and a fiducial on the wafer surface, the fiducial can be located. The wafer can then be initially aligned. During a fine alignment process, the bump pattern technique can again be used and additional alignment performed. Blurring can be used so that features other than bumps become less discernable.
    Type: Application
    Filed: July 11, 2002
    Publication date: February 6, 2003
    Applicant: Electrogas, Inc.
    Inventors: Cary Kiest, Leda Villalobos