Patents by Inventor Casey Grant

Casey Grant has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070188664
    Abstract: Systems for switching a displayed signal for a display between a plurality of signals are disclosed. In one embodiment, the system includes a microcontroller; a chooser for choosing a primary signal from a plurality of program-variable signals at the microcontroller; a monitor tuner coupled to the microcontroller for tuning the primary signal during switching of the displayed signal from the primary signal to a secondary signal; a detector coupled to the monitor tuner and the microcontroller for detecting a predetermined condition in the primary signal; and a selector coupled to the microcontroller for switching the displayed signal from the secondary signal to the primary signal upon occurrence of the predetermined condition. A user can switch between signals such as television channels or other dedicated functions without the risk of missing a portion of the program material.
    Type: Application
    Filed: February 15, 2006
    Publication date: August 16, 2007
    Inventors: Ahmed Ginawi, Casey Grant, Christopher Ro, Sebastian Ventrone
  • Publication number: 20070117404
    Abstract: A semiconductor wafer structure. The structure comprises a plurality of semiconductor wafers. The plurality of semiconductor wafers comprises a first semiconductor wafer and a second semiconductor wafer. The first semiconductor wafer is located adjacent to the second semiconductor wafer such that no additional wafers of the plurality of semiconductor wafers is located between a topside of the first semiconductor wafer and a backside of the of the second semiconductor wafer. A relationship is provided between a plurality of values for an electrical characteristic and a plurality of materials. A substructure is formed comprising a material from the plurality of materials existing in the relationship sandwiched between a topside of the first semiconductor wafer and a backside of the of the second semiconductor wafer. The first semiconductor wafer comprises a discrete value from the plurality of values for the electrical characteristic that correlates with the material in said relationship.
    Type: Application
    Filed: January 22, 2007
    Publication date: May 24, 2007
    Inventors: Casey Grant, Heidi Greer, Steven Shank, Michael Triplett
  • Publication number: 20060024916
    Abstract: A method and structure for fabricating semiconductor wafers. The method comprises providing a plurality of semiconductor wafers. The plurality of semiconductor wafers comprises a first semiconductor wafer and a second semiconductor wafer. The first semiconductor wafer is located adjacent to the second semiconductor wafer. A relationship is provided between a plurality of values for an electrical characteristic and a plurality of materials. A material is chosen from the plurality of materials existing in the relationship. A substructure is formed comprising the material sandwiched between a topside of the first semiconductor wafer and a backside of a portion of the of the second semiconductor wafer. The plurality of semiconductor wafers are placed into a furnace comprising an elevated temperature for processing resulting in a value for the first semiconductor wafer of the electrical characteristic that corresponds to said material in said relationship.
    Type: Application
    Filed: July 29, 2004
    Publication date: February 2, 2006
    Applicant: International Business Machines Corporation
    Inventors: Casey Grant, Heidi Greer, Steven Shank, Michael Triplett