Patents by Inventor Catherine A. Yadlon

Catherine A. Yadlon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8966103
    Abstract: A method of processing time-based content includes streaming the time-based content to a receiving device in a normal mode, evaluating a numerical difference between a program clock reference timestamp and a decode timestamp in the content at a transition out of said normal mode, streaming the content to the receiving device in a trick play mode, and altering the content during the trick play mode such that a numerical difference between the timestamps at a transition back into the normal mode is substantially equal to the numerical difference between the timestamps at the transition out of said normal mode.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: February 24, 2015
    Assignee: General Instrument Corporation
    Inventors: Vitaliy M. Slobotskoy, Catherine A. Yadlon
  • Patent number: 8862783
    Abstract: Via use of a shared data bus, a processor system offloads processing tasks. For example, a processor system communicates over a respective data bus with a data communication controller. After notifying the data communication controller of a particular block of data to retrieve, the processor system relinquishes control of the respective data bus so that the data communication controller can control the data bus and store a block of data in a specified memory location using direct memory access techniques. Upon receiving a notification of completion of storing the data block by the data communication controller, the processor system regains control of the respective data bus and notifies a data forwarding circuit to: i) partition the block of data into data packets, ii) apply respective headers to the data packets based on the header information received from the processor system, and iii) forward the data packets to the respective destination.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: October 14, 2014
    Assignee: Broadbus Technologies, Inc.
    Inventors: Catherine A. Yadlon, Neil T. Hentschel, Brittain S. McKinley
  • Patent number: 8144719
    Abstract: A system includes multiple input ports that forward received data (e.g., data packets) to each of multiple queues. Data received at the input ports of the system can be somewhat random or “bursty” at times. That is, the input ports can receive data at a variable bit rate or unspecified bit rate from an internal system source or an external source such as an FTP (File Transfer Protocol) server or SCSI disk array. The queues output data at a constant bit rate. A two-dimensional scheduler associated with the system forces random inbound server traffic from the input ports to adhere to a QoS (Quality of Service) agreement such that the random nature of the inbound traffic does not negatively affect the deterministic guarantees of existing server traffic output from the queues. In other words, techniques herein ensure adherence to QoS requirements among the data flows, without overflowing the queues.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: March 27, 2012
    Assignee: Broadbus Technologies, Inc.
    Inventors: Catherine A. Yadlon, Michael A. Kahn, Francis J. Stifter, Jr.
  • Publication number: 20090164652
    Abstract: A method of processing time-based content includes streaming the time-based content to a receiving device in a normal mode, evaluating a numerical difference between a program clock reference timestamp and a decode timestamp in the content at a transition out of said normal mode, streaming the content to the receiving device in a trick play mode, and altering the content during the trick play mode such that a numerical difference between the timestamps at a transition back into the normal mode is substantially equal to the numerical difference between the timestamps at the transition out of said normal mode.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 25, 2009
    Applicant: GENERAL INSTRUMENT CORPORATION
    Inventors: Vitaliy M. Slobotskoy, Catherine A. Yadlon
  • Publication number: 20070116025
    Abstract: A system includes multiple input ports that forward received data (e.g., data packets) to each of multiple queues. Data received at the input ports of the system can be somewhat random or “bursty” at times. That is, the input ports can receive data at a variable bit rate or unspecified bit rate from an internal system source or an external source such as an FTP (File Transfer Protocol) server or SCSI disk array. The queues output data at a constant bit rate. A two-dimensional scheduler associated with the system forces random inbound server traffic from the input ports to adhere to a QoS (Quality of Service) agreement such that the random nature of the inbound traffic does not negatively affect the deterministic guarantees of existing server traffic output from the queues. In other words, techniques herein ensure adherence to QoS requirements among the data flows, without overflowing the queues.
    Type: Application
    Filed: October 25, 2005
    Publication date: May 24, 2007
    Inventors: Catherine Yadlon, Michael Kahn, Francis Stifter
  • Publication number: 20070115983
    Abstract: Via use of a shared data bus, a processor system offloads processing tasks. For example, a processor system communicates over a respective data bus with a data communication controller. After notifying the data communication controller of a particular block of data to retrieve, the processor system relinquishes control of the respective data bus so that the data communication controller can control the data bus and store a block of data in a specified memory location using direct memory access techniques. Upon receiving a notification of completion of storing the data block by the data communication controller, the processor system regains control of the respective data bus and notifies a data forwarding circuit to: i) partition the block of data into data packets, ii) apply respective headers to the data packets based on the header information received from the processor system, and iii) forward the data packets to the respective destination.
    Type: Application
    Filed: October 25, 2005
    Publication date: May 24, 2007
    Inventors: Catherine Yadlon, Neil Hentschel, Brittain McKinley