Patents by Inventor Catherine Kardach

Catherine Kardach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9064083
    Abstract: In one embodiment, a method for aligning an image of a semiconductor device with a bitmap representation thereof includes receiving diffusion layer information of at least a portion of the semiconductor device, receiving implant layer information of the at least a portion of the semiconductor device, deriving distinct p- and n-doped region information from the received diffusion and implant layer information, generating the bitmap representation, including a differentiation between the distinct p- and n-doped regions, and performing an alignment operation of the image of the semiconductor device with generated bitmap representation.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: June 23, 2015
    Assignee: DCG SYSTEMS, INC.
    Inventors: Jan Durec, Catherine Kardach
  • Publication number: 20140047396
    Abstract: In one embodiment, a method for aligning an image of a semiconductor device with a bitmap representation thereof includes receiving diffusion layer information of at least a portion of the semiconductor device, receiving implant layer information of the at least a portion of the semiconductor device, deriving distinct p- and n-doped region information from the received diffusion and implant layer information, generating the bitmap representation, including a differentiation between the distinct p- and n-doped regions, and performing an alignment operation of the image of the semiconductor device with generated bitmap representation.
    Type: Application
    Filed: August 7, 2013
    Publication date: February 13, 2014
    Applicant: DCG Systems, Inc.
    Inventors: Jan Durec, Catherine Kardach
  • Patent number: 7135123
    Abstract: The backside navigation method of the present invention includes milling a fiducial opening through the substrate of an integrated circuit. The milling process is stopped when the fiducial opening reaches the bottom of a trench isolation structure. The trench isolation structure delineated by the fiducial opening may be imaged and registered to a computer aided design layout image to achieve sub-micron navigation resolution.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: November 14, 2006
    Assignee: Credence Systems Corporation
    Inventors: Mark Alan Thompson, Erwan Le Roy, Theodore Lundquist, William B. Thompson, Catherine Kardach