Abstract: An linear optical sensor charged-coupled topology using single-stage inverting charge-coupled amplifier driving an analog-to-digital converter which uses the converter full-scale reference as a precharge level. Since an offset in the range of 100–200 mV is introduced in the charge amplifier, a corresponding offset is also introduced into the ADC to allow the amplifier to more quickly drive the amplifier output to a low level. The converter offset is proportional to the converter reference to ensure that it is controlled and tracks the reference.

Abstract: A technique for serially controlling an array of optical sensor chips over a pair of signal lines. After broadcasting an initializing reset command to all chips over serial lines, a determine-address command is broadcast to commence unique address determination. On subsequent clock signals, each chip locks its address into an on-board register. Following this process, each chip can be addressed individually. Subsequently, when each array chip is directed to read data out, the data is output to a single common bus line to the controller. Alternatively, individual chip outputs may be connected directly to the controller, or the outputs of odd and even chip pairs may be tied together for broadcast readout of all odd chips or all even chips.

Abstract: An optical sensor array with zone-programmable gain and offset prior to A/D conversion for reducing quantization noise. The circuit comprises a register file which contains digital words for controlling gain and offset according to multi-pixel zones.

Abstract: A driver circuit (12) having a controlled transition rate is provided. The driver circuit (12) includes a first device (56) operable to switch a supply voltage to load. A second device (54) is coupled to an input for the first device (56) in source follower arrangement. A third device (66), coupled to the input for first device (56) and an output for the second device (54), is operable to function as a Miller amplifier in conjunction with the first device (56). A fourth device (152) is coupled to an input of the second device (54). The fourth device (152) is operable to function as a Miller amplifier in conjunction with the first device (56) and the second device (54). A capacitor (68) is coupled between an output for the first device (56) and inputs for the third device (66) and the fourth device (152). The capacitor (68) is operable to function as a Miller capacitor to control transition rates at the output of the first device (56).

Abstract: A driver circuit (12) having a reduced propagation delay is provided. The driver circuit (12) includes a first device (56) having an input and operable to switch a supply voltage to a load (14). A second device (54) having an output coupled to the input of the first device (56), operable to turn on the first device upon receipt of a first signal. A third device (66) having an output coupled to the input of the first device (56), operable to turn off the first device upon receipt of a second signal. A kick start circuit (30) coupled to the input for the first device (56), the input for the second device (54), and the input for the third device (66), operable to generate a threshold voltage on the first device (56), the second device (54), and the third device (66). The kick start circuit (30) operable to produce a threshold voltage that is just below the voltage in which the first device (56), the second device (54), and the third device (66) turn on, or conduct.

Abstract: Managed integration optical sensor array (11) having an array block (12). The array block having a plurality of optical sensors (13), a switch control logic circuit (59) and a bit shift register (60). The switch control logic circuit (59) operating to control the integration periods of each optical sensor (13).

Abstract: Active integrator optical sensor (13) having a photodetector (56) and an active integrator circuit. The active integrator circuit having an operational amplifier (50), an integrating capacitor (51) an offset capacitor (54) and a store capacitor (52). The active integrator circuit operating to integrate the electrical signal from photodetector (56).

Abstract: Color optical sensor array (11) having a color optical sensor (13) with each color optical sensor (13) having a color photodetector (56) and an active integrator circuit. The active integrator circuit having an operational amplifier (50) and an integrating capacitor (51), the active integrator circuit operating to integrate and normalize the electrical signal from color photodetector (56).

Abstract: A monolithic light-to-digital signal converter (1.10) includes a photodiode array (1.24) having a plurality of sections with each section producing a current signal in response to incident light, a current-to-digital signal converter circuit (1.28) for converting selected ones of the current signals to a digital signal, and a control circuit (1.26) for scaling the digital signal in response to user supplied programming signals. The control circuit (1.26) also responds to user supplied programming signals to supply control signals to current-to-digital signal converter circuit (1.28). Current-to-digital signal converter circuit (1.28) is responsive to the control signals for combining selected ones of the current signals into a composite current signal and converting the composite current signal to a digital signal.

Abstract: A power supply control circuit (20) selectively provides power to an integrated circuit from either a primary power supply terminal (22), or through terminals (24, 26) connected to backup batteries. The voltage level of the primary power is monitored continuously and when it drops to a predetermined level one of the two backup batteries is substituted to power the integrated circuit in a power-down mode. The circuit (20) includes a level detector circuit (32) and a voltage reference circuit (98). In the power-down mode one battery is connected to power the integrated circuit and this battery is continuously monitored. When the voltage of the on-line battery drops to below a fixed level in comparison to off-line battery a control logic circuit (92) activates switches (56) to substitute the off-line battery for the on-line battery. Control logic circuitry (92) is provided to disconnect the control signals from the integrated circuit to prevent loss of stored information.

Abstract: A laser programmable logic switch (22) includes a fusible link (28), an output node (26) and a transistor (24) which is fabricated to be in the off state. When it is desired to have the output node (26) at a low logic state, the circuit (22) is left unchanged. But if it is determined that the output node (26) should be at a high logic level state, the fusible link (28) is opened by a first laser pulse. A second laser pulse is then applied to transistor (24) to cause damage to the structure of the transistor (24). The transistor (24) can be damaged in any of a number of modes which result in the formation of a conducting path between the output node (26) and the power terminal V.sub.cc. Unlike conventional laser switch circuits, the circuit (22) does not draw static power under any conditions thereby reducing power consumption by the integrated circuit utilizing such a laser switched gate.