Abstract: A wide format thermal printhead is provided which comprises a baseplate; a first substrate with a border portion removed from a first edge thereof to form a second edge, the first substrate being mounted on the baseplate; and a second substrate with a border portion removed from a first edge thereof to form a second edge, the second substrate being mounted on the baseplate with the second edge of the second substrate abutting the second edge of the first substrate to form a print surface having an extended active print width. Also provided is a thermal recording device with wide format capabilities which comprises the wide format thermal printhead as described.

Abstract: A high-resolution laser graphics plotter for plotting data on a recording medium as selectively positioned spots (pixels) of variable intensity is disclosed. The intensity of a collimated laser beam is modulated in response to plotting data to produce a modulated light beam. The modulated light beam produces a spot on a light-sensitive film positioned in a flat field image plane. A multi-facet rotating mirror scans the modulated beam across the image plane. A flat field scan lens is positioned between the rotating mirror and the image plane to provide correction for the non-linear velocity of the beam as it is scanned across the image plane, and to provide a constant diffraction limited spot size for each spot plotted. A spot placement means is provided to generate the spot placement signal which cooperates with the plot data to modulate the laser beam.

Abstract: A special purpose hardware peripheral which acts as a high speed auxiliary processor. Read-only memory controllers and floating point arithmetic are used to accurately produce high speed processing of arrays of data, thus effectively increasing the processing power of the minicomputer. The system employs an internal memory of two independent sections with means for parallel (simultaneous) operation; employing one section in conjunction with an arithmetic unit while employing the other section in conjunction with data transfer to and from CPU main memory. Three ROM controllers are employed for controlling this simultaneous operation of the memory, the arithmetic unit and the data transfer to and from CPU main memory.