Patents by Inventor Cecile Aulnette

Cecile Aulnette has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7018910
    Abstract: A process for producing a structure of a thin layer of semiconductor material obtained from a composite structure donor wafer. The donor wafer includes a lattice parameter matching layer of a matching substrate that advantageously has an upper layer of semiconductor material having a first lattice parameter. A film of semiconductor material having a second, nominal, lattice parameter that is substantially different from the first lattice parameter is strained by the matching layer. A region of weakness is created in the matching substrate to facilitate splitting. A relaxed layer has a nominal lattice parameter that is substantially identical to the first lattice parameter. The relaxed layer is transferred to a receiving substrate. A number of different wafers can be made by this process.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: March 28, 2006
    Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.
    Inventors: Bruno Ghyselen, Cécile Aulnette, Bénédite Osternaud
  • Patent number: 7008857
    Abstract: A method of recycling a donor wafer after detaching at least one useful layer is provided, the donor wafer comprising successively a substrate, a buffer structure and, before detachment, a useful layer. The method includes removal of substance relating to part of the donor wafer on the side where the detachment took place, such that, after removal of substance, there remains at least part of the buffer structure capable of being reused as at least part of a buffer structure during a subsequent detachment of a useful layer. The present document also relates to a method of producing a donor wafer which can be recycled according to the invention, methods of detaching a thin layer from a donor wafer which can be recycled according to the invention, and donor wafers which can be recycled according to the invention.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: March 7, 2006
    Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.
    Inventors: Bruno Ghyselen, Cécile Aulnette, Bénédite Osternaud, Yves-Mathieu Vaillant, Takeshi Akatsu
  • Patent number: 6995427
    Abstract: A semiconductor structure having a high-strained crystalline layer with a low crystal defect density and a method for fabricating such a semiconductor structure are disclosed. The structure includes a substrate having a first material comprising germanium or a Group (III)–Group (V)-semiconductor or alloy thereof. In addition, a crystalline epitaxial first layer, comprising a graded buffer layer and a substantially relaxed layer, is provided. The buffer layer is sufficiently relaxed to provide relaxation of the substantially relaxed layer deposited thereon. A further layer may be provided on the first layer, and the transfer of at least the further layer is facilitated by providing a weakened zone in the first layer.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: February 7, 2006
    Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.
    Inventors: Cécile Aulnette, Frédéric Dupont, Carlos Mazuré
  • Patent number: 6991956
    Abstract: A method for transferring a layer of semiconductor material from a wafer is described. The wafer includes a support substrate and an upper surface that includes a buffer layer of a material having a first lattice parameter. In an embodiment, the technique includes growing a strained layer on the buffer layer. The strained layer is made of a semiconductor material having a nominal lattice parameter that is substantially different from the first lattice parameter, and it is grown to a thickness that is sufficiently thin to avoid relaxation of the strain therein. The method also includes growing a relaxed layer on the strained layer. The relaxed layer is made of silicon and has a concentration of at least one other semiconductor material that has a nominal lattice parameter that is substantially identical to the first lattice parameter. The technique also includes providing a weakened zone in the buffer layer, and supplying energy to detach a structure at the weakened zone.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: January 31, 2006
    Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.
    Inventors: Bruno Ghyselen, Cécile Aulnette, Bénédite Osternaud, Nicolas Daval
  • Patent number: 6991995
    Abstract: A method of producing a semiconductor structure having at least one support substrate and an ultrathin layer. The method includes bonding a support substrate to a source substrate, detaching a useful layer along a zone of weakness to obtain an intermediate structure including at least the transferred useful layer and the support substrate, and treating the transferred useful layer to obtain an ultrathin layer on the support substrate. The source substrate includes a front face and a zone of weakness below the front face that defines the useful layer, and the useful layer is sufficiently thick to withstand heat treatments without forming defects therein so that it can be reduced in thickness to form the ultrathin layer. The resulting ultrathin layer is suitable for use in applications in the fields of electronics, optoelectronics or optics.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: January 31, 2006
    Assignees: S.O.I.Tec Silicon on Insulator Technologies S.A., Commissariat à l' Energie Atomique (CEA)
    Inventors: Cécile Aulnette, Benoît Bataillou, Bruno Ghyselen, Hubert Moriceau
  • Patent number: 6955971
    Abstract: A semiconductor structure and methods for fabricating are disclosed. In an implementation, a method of fabricating a semiconductor structure includes forming a first semiconductor material substrate with a first dielectric area having a first thickness and a second dielectric area having a second thickness, bonding the first substrate to a second semiconductor substrate, and thinning at least one of the first and second substrates. The invention also pertains to a semiconductor structure. The structure includes a semiconductor substrate having a surface layer of semiconductor material, a first dielectric layer of a first dielectric material buried under the surface layer, and a second dielectric layer buried under the surface layer. In an embodiment, the thickness of the first dielectric layer is different than the thickness of the second dielectric layer.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: October 18, 2005
    Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.
    Inventors: Bruno Ghyselen, Oliver Rayssac, Cécile Aulnette, Carlos Mazuré
  • Publication number: 20050189323
    Abstract: The invention relates to a method of re-forming a useful layer on a donor wafer after taking off a useful layer formed of a material chosen from among semiconductor materials. The donor wafer includes in succession a substrate and a taking-off structure, the taking-off structure includes the taken-off useful layer before taking-off. The method includes a removal of material involving a portion of the donor wafer on the side where the useful layer has been taken off. The material is removed by mechanical means so as to preserve a portion of the taking-off structure to form at least one other useful layer which can be taken off after re-forming, without adding additional material to the wafer.
    Type: Application
    Filed: March 7, 2005
    Publication date: September 1, 2005
    Inventors: Bruno Ghyselen, Cecile Aulnette, Benedite Osternaud, Takeshi Akatsu, Bruce Faure
  • Publication number: 20050191825
    Abstract: A method for transferring a layer of semiconductor material from a wafer is described. The wafer includes a support substrate and an upper surface that includes a buffer layer of a material having a first lattice parameter. In an embodiment, the technique includes growing a strained layer on the buffer layer. The strained layer is made of a semiconductor material having a nominal lattice parameter that is substantially different from the first lattice parameter, and it is grown to a thickness that is sufficiently thin to avoid relaxation of the strain therein. The method also includes growing a relaxed layer on the strained layer. The relaxed layer is made of silicon and has a concentration of at least one other semiconductor material that has a nominal lattice parameter that is substantially identical to the first lattice parameter. The technique also includes providing a weakened zone in the buffer layer, and supplying energy to detach a structure at the weakened zone.
    Type: Application
    Filed: January 10, 2005
    Publication date: September 1, 2005
    Inventors: Bruno Ghyselen, Cecile Aulnette, Benedite Osternaud, Nicolas Daval
  • Publication number: 20050170611
    Abstract: The invention relates to a method of transferring useful layers from a donor wafer which includes a multi-layer structure on the surface of the donor wafer that has a thickness sufficient to form multiple useful layers for subsequent detachment. The layers may be formed of materials having sufficiently different properties such that they may be selectively removed. The layers of material may also include sub-layers that can be selectively removed from each other.
    Type: Application
    Filed: March 7, 2005
    Publication date: August 4, 2005
    Inventors: Bruno Ghyselen, Cecile Aulnette, Benedite Osternaud, Takeshi Akatsu, Yves Levaillant
  • Publication number: 20050167002
    Abstract: The invention relates to a substrate that includes a multi-layer structure on the surface of a donor wafer that has a thickness sufficient to form multiple useful layers for subsequent detachment. The layers may be formed of materials having sufficiently different properties such that they may be selectively removed. The layers of material may also include sub-layers that can be selectively removed from each other.
    Type: Application
    Filed: March 7, 2005
    Publication date: August 4, 2005
    Inventors: Bruno Ghyselen, Cecile Aulnette, Benedite Osternaud, Takeshi Akatsu, Yves Le Vaillant
  • Publication number: 20050150447
    Abstract: The invention relates to a recyclable donor wafer that includes a substrate and a formed layer thereon, wherein the formed layer has a thickness sufficient to provide (a) at least two useful layers for detachment therefrom and (b) additional material that can be removed to planarize exposed surfaces of the useful layers prior to detachment from the donor wafer.
    Type: Application
    Filed: March 7, 2005
    Publication date: July 14, 2005
    Inventors: Bruno Ghyselen, Cecile Aulnette, Benedite Osternaud, Takeshi Akatsu, Bruce Faure
  • Patent number: 6908774
    Abstract: A method for adjusting the thickness of a thin semiconductor material layer. The method includes measuring the layer to establish a thickness profile, determining thickness adjustment specifications from the measured thickness profile, and adjusting the thickness of the layer in accordance with the specifications by sacrificial oxidation. An apparatus for adjusting the thickness of a thin layer of semiconductor material according to this method is also disclosed.
    Type: Grant
    Filed: August 6, 2003
    Date of Patent: June 21, 2005
    Assignee: S.O. I. Tec Silicon on Insulator Technologies S.A.
    Inventors: Bruno Ghyselen, Cécile Aulnette, Bénédite Osternaud
  • Publication number: 20050066886
    Abstract: The present invention relates to a method of fabrication of a substrate for an epitaxial growth. A relaxed epitaxial base layer is obtained on an auxiliary substrate. The invention allows the fabrication of substrates with a more efficient epitaxial growth of a material with a desired lattice parameter on another material with a different lattice parameter. The material can be grown with a high thermodynamic and crystallographic stability. At least a part of the epitaxial base layer is transferred onto a carrier substrate, forming a base substrate, and growing the material of the epitaxial base layer is further grown on the carrier substrate.
    Type: Application
    Filed: April 20, 2004
    Publication date: March 31, 2005
    Inventors: Takeshi Akatsu, Cecile Aulnette, Bruno Ghyselen
  • Publication number: 20050070078
    Abstract: The invention provides a method of producing a structure of a thin layer of semiconductor material on a support substrate. The thin layer is obtained from a donor substrate and includes an upper layer of semiconductor material. The method includes forming on the upper layer a bonding layer of a material that accepts diffusion from an element of the material of the upper layer, bonding the donor substrate from the side on which the bonding layer is formed on the upper layer to the support substrate, and diffusing the element from the upper layer into the bonding layer to homogenize the concentration of the element in the bonding layer and the upper layer. The result is that the thin layer of the structure is joined by the bonding layer to the upper layer.
    Type: Application
    Filed: January 6, 2004
    Publication date: March 31, 2005
    Inventors: Nicolas Daval, Bruno Ghyselen, Cecile Aulnette, Oliver Rayssac, Ian Cayrefourcq
  • Publication number: 20050023610
    Abstract: A semiconductor-on-insulator structure for electronics, optics or optoelectronics, in which a semiconductor layer includes desirable elastic constraints. The structure includes a substrate, an insulating layer on the substrate, and a semiconductor layer on the insulating layer. The semiconductor layer has elastic constraints, and the insulating layer is made of an electrically insulating material having a viscosity temperature TG that is sufficiently high so as to protect the semiconductor layer from loss of the elastic constraints when the structure is exposed to a temperature of about 950° C. or more. Also described is a process for producing such a semiconductor-on-insulator structure.
    Type: Application
    Filed: November 3, 2003
    Publication date: February 3, 2005
    Inventors: Bruno Ghyselen, Cecile Aulnette, Olivier Rayssac
  • Publication number: 20040248378
    Abstract: A method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate. The method includes providing an initial structure that includes a useful layer having a front face on a support substrate. Atomic species are implanted into the useful layer to a controlled mean implantation depth to form a zone of weakness within the useful layer that defines first and second useful layers. Next, a stiffening substrate is bonded to the front face of the initial structure. The first useful layer is then detached from the second useful layer along the zone of weakness to obtain a pair of semiconductor structures with a first structure including the stiffening substrate and the first useful layer and a second structure including the support substrate and the second useful layer. The structures obtained can be used in the fields of electronics, optoelectronics or optics.
    Type: Application
    Filed: October 14, 2003
    Publication date: December 9, 2004
    Inventors: Bruno Ghyselen, Cecile Aulnette, Benoit Bataillou, Carlos Mazure, Hubert Moriceau
  • Publication number: 20040248380
    Abstract: A method of producing a semiconductor structure having at least one support substrate and an ultrathin layer. The method includes bonding a support substrate to a source substrate, detaching a useful layer along a zone of weakness to obtain an intermediate structure including at least the transferred useful layer and the support substrate, and treating the transferred useful layer to obtain an ultrathin layer on the support substrate. The source substrate includes a front face and a zone of weakness below the front face that defines the useful layer, and the useful layer is sufficiently thick to withstand heat treatments without forming defects therein so that it can be reduced in thickness to form the ultrathin layer. The resulting ultrathin layer is suitable for use in applications in the fields of electronics, optoelectronics or optics.
    Type: Application
    Filed: February 20, 2004
    Publication date: December 9, 2004
    Inventors: Cecile Aulnette, Benoit Bataillou, Bruno Ghyselen, Hubert Moriceau
  • Publication number: 20040157409
    Abstract: A process for producing a structure of a thin layer of semiconductor material obtained from a composite structure donor wafer. The donor wafer includes a lattice parameter matching layer of a matching substrate that advantageously has an upper layer of semiconductor material having a first lattice parameter. A film of semiconductor material having a second, nominal, lattice parameter that is substantially different from the first lattice parameter is strained by the matching layer. A region of weakness is created in the matching substrate to facilitate splitting. A relaxed layer has a nominal lattice parameter that is substantially identical to the first lattice parameter. The relaxed layer is transferred to a receiving substrate. A number of different wafers can be made by this process.
    Type: Application
    Filed: July 8, 2003
    Publication date: August 12, 2004
    Inventors: Bruno Ghyselen, Cecile Aulnette, Benedite Osternaud
  • Publication number: 20040150067
    Abstract: A semiconductor structure and methods for fabricating are disclosed. In an implementation, a method of fabricating a semiconductor structure includes forming a first semiconductor material substrate with a first dielectric area having a first thickness and a second dielectric area having a second thickness, bonding the first substrate to a second semiconductor substrate, and thinning at least one of the first and second substrates. The invention also pertains to a semiconductor structure. The structure includes a semiconductor substrate having a surface layer of semiconductor material, a first dielectric layer of a first dielectric material buried under the surface layer, and a second dielectric layer buried under the surface layer. In an embodiment, the thickness of the first dielectric layer is different than the thickness of the second dielectric layer.
    Type: Application
    Filed: November 12, 2003
    Publication date: August 5, 2004
    Inventors: Bruno Ghyselen, Oliver Rayssac, Cecile Aulnette, Carlos Mazure
  • Publication number: 20040152284
    Abstract: A method of recycling a donor wafer after detaching at least one useful layer is provided, the donor wafer comprising successively a substrate, a buffer structure and, before detachment, a useful layer. The method includes removal of substance relating to part of the donor wafer on the side where the detachment took place, such that, after removal of substance, there remains at least part of the buffer structure capable of being reused as at least part of a buffer structure during a subsequent detachment of a useful layer. The present document also relates to a method of producing a donor wafer which can be recycled according to the invention, methods of detaching a thin layer from a donor wafer which can be recycled according to the invention, and donor wafers which can be recycled according to the invention.
    Type: Application
    Filed: January 23, 2004
    Publication date: August 5, 2004
    Inventors: Bruno Ghyselen, Cecile Aulnette, Benedite Osternaud, Yves-Mathieu Vaillant, Takeshi Akatsu