Patents by Inventor Cedric OUVRARD
Cedric OUVRARD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11848379Abstract: A vertical power semiconductor transistor device includes: a drain region of a first conductivity type; a body region of a second conductivity type; a drift region of the first conductivity type which separates the body region from the drain region; a source region of the first conductivity type separated from the drift region by the body region; a gate trench extending through the source and body regions and into the drift region, the gate trench including a gate electrode; and a field electrode in the gate trench or in a separate trench. The drift region has a generally linearly graded first doping profile which increases from the body region toward a bottom of the trench that includes the field electrode, and a graded second doping profile that increases at a greater rate than the first doping profile from an end of the first doping profile toward the drain region.Type: GrantFiled: September 23, 2021Date of Patent: December 19, 2023Assignee: Infineon Technologies Austria AGInventors: Ralf Siemieniec, David Laforet, Cédric Ouvrard
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Patent number: 11764272Abstract: The disclosure relates to a semiconductor device having a first active region, a plurality of elongated gate regions having an elongated extension in a first lateral direction, respectively, a plurality of elongated field plate regions having an elongated extension in the first lateral direction, respectively, and a first additional gate region, wherein a first one of the elongated gate regions is arranged in a first elongated gate trench at a first side of the first active region, and a second one of the elongated gate regions is arranged in a second elongated gate trench at a second side of the first active region, the second side lying opposite to the first side with respect to a second lateral direction, and wherein the first additional gate region is arranged in a first additional gate trench which extends at least proportionately in the second lateral direction through the first active region.Type: GrantFiled: May 17, 2021Date of Patent: September 19, 2023Assignee: Infineon Technologies Austria AGInventors: David Laforet, Cesar Augusto Braz, Alessandro Ferrara, Cédric Ouvrard, Li Juin Yip
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Publication number: 20230055891Abstract: In an embodiment, a transistor device comprises a semiconductor body comprising a plurality of transistor cells comprising a drift region of a first conductivity type, a body region of a second conductivity type forming a first pn junction with the drift region, the second conductivity type opposing the first conductivity type, a source region of the first conductivity type forming a second pn junction with the body region, a columnar field plate trench extending into a major surface of a semiconductor body and comprising a columnar field plate and a gate trench structure extending into the major surface of the semiconductor body and comprising a gate electrode. At least one of the depth and doping level of the body region locally varies within the transistor cell to improve VGSTH homogeneity within the transistor cell.Type: ApplicationFiled: February 7, 2020Publication date: February 23, 2023Inventors: Oliver Blank, Cesar Augusto Braz, Yan Gao, Olivier Guillemant, Franz Hirler, David Laforet, Peter Lagger, Cédric Ouvrard, Elias Pree, Li Juin Yip
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Publication number: 20220376062Abstract: A semiconductor device includes a transistor cell region, and a first termination region devoid of transistor cells. The transistor cell region includes a gate structure, a plurality of needle-shaped first field plate structures, body regions of a second conductivity type, and source regions of a first conductivity type. The first termination region surrounds the transistor cell region and includes needle-shaped second field plate structures. The needle-shaped first field plate structures are arranged in a first pattern and the needle-shaped second field plate structures are arranged in a second pattern.Type: ApplicationFiled: August 5, 2022Publication date: November 24, 2022Inventors: Ralf Siemieniec, Oliver Blank, Franz Hirler, Michael Hutzler, David Laforet, Cédric Ouvrard, Li Juin Yip
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Patent number: 11462620Abstract: A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a gate structure extending from a first surface into the semiconductor substrate, a plurality of needle-shaped first field plate structures extending from the first surface into the semiconductor substrate, body regions of a second conductivity type, and source regions of a first conductivity type formed between the body regions and the first surface. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The needle-shaped first field plate structures are arranged in a first pattern and the needle-shaped second field plate structures are arranged in a second pattern.Type: GrantFiled: November 16, 2020Date of Patent: October 4, 2022Assignee: Infineon Technologies Austria AGInventors: Ralf Siemieniec, Oliver Blank, Franz Hirler, Michael Hutzler, David Laforet, Cédric Ouvrard, Li Juin Yip
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Patent number: 11296218Abstract: A semiconductor device includes a semiconductor body having first and second opposing surfaces, an active area including active transistor cells, and an edge termination region laterally surrounding the active area. Each active transistor cell includes a mesa and a columnar trench having a field plate. The edge termination region includes inactive cells each including a columnar termination trench having a field plate, and a termination mesa including a drift region of a first conductivity type. The edge termination region includes a transition region laterally surrounding the active region and an outer termination region laterally surrounding the transition region. In the transition region, the termination mesa includes a body region of a second conductivity type arranged on the drift region. In the outer termination region, the drift region extends to the first surface. A buried doped region of the edge termination region is positioned in the transition and outer termination regions.Type: GrantFiled: May 13, 2020Date of Patent: April 5, 2022Assignees: Infineon Technologies Austria AG, Infineon Technologies Americas Corp.Inventors: Ralf Siemieniec, Adam Amali, Michael Hutzler, Laszlo Juhasz, David Laforet, Cedric Ouvrard, Li Juin Yip
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Publication number: 20220013665Abstract: A vertical power semiconductor transistor device includes: a drain region of a first conductivity type; a body region of a second conductivity type; a drift region of the first conductivity type which separates the body region from the drain region; a source region of the first conductivity type separated from the drift region by the body region; a gate trench extending through the source and body regions and into the drift region, the gate trench including a gate electrode; and a field electrode in the gate trench or in a separate trench. The drift region has a generally linearly graded first doping profile which increases from the body region toward a bottom of the trench that includes the field electrode, and a graded second doping profile that increases at a greater rate than the first doping profile from an end of the first doping profile toward the drain region.Type: ApplicationFiled: September 23, 2021Publication date: January 13, 2022Inventors: Ralf Siemieniec, David Laforet, Cédric Ouvrard
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Publication number: 20210367045Abstract: The disclosure relates to a semiconductor device having a first active region, a plurality of elongated gate regions having an elongated extension in a first lateral direction, respectively, a plurality of elongated field plate regions having an elongated extension in the first lateral direction, respectively, and a first additional gate region, wherein a first one of the elongated gate regions is arranged in a first elongated gate trench at a first side of the first active region, and a second one of the elongated gate regions is arranged in a second elongated gate trench at a second side of the first active region, the second side lying opposite to the first side with respect to a second lateral direction, and wherein the first additional gate region is arranged in a first additional gate trench which extends at least proportionately in the second lateral direction through the first active region.Type: ApplicationFiled: May 17, 2021Publication date: November 25, 2021Inventors: David Laforet, Cesar Augusto Braz, Alessandro Ferrara, Cédric Ouvrard, Li Juin Yip
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Patent number: 11158735Abstract: A vertical power semiconductor transistor device includes: a drain region of a first conductivity type; a body region of a second conductivity type; a drift region of the first conductivity type which separates the body region from the drain region; a source region of the first conductivity type separated from the drift region by the body region; a gate trench extending through the source and body regions and into the drift region, the gate trench including a gate electrode; and a field electrode in the gate trench or in a separate trench. The drift region has a generally linearly graded first doping profile which increases from the body region toward a bottom of the trench that includes the field electrode, and a graded second doping profile that increases at a greater rate than the first doping profile from an end of the first doping profile toward the drain region.Type: GrantFiled: February 5, 2020Date of Patent: October 26, 2021Assignee: Infineon Technologies Austria AGInventors: Ralf Siemieniec, David Laforet, Cedric Ouvrard
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Publication number: 20210242340Abstract: A vertical power semiconductor transistor device includes: a drain region of a first conductivity type; a body region of a second conductivity type; a drift region of the first conductivity type which separates the body region from the drain region; a source region of the first conductivity type separated from the drift region by the body region; a gate trench extending through the source and body regions and into the drift region, the gate trench including a gate electrode; and a field electrode in the gate trench or in a separate trench. The drift region has a generally linearly graded first doping profile which increases from the body region toward a bottom of the trench that includes the field electrode, and a graded second doping profile that increases at a greater rate than the first doping profile from an end of the first doping profile toward the drain region.Type: ApplicationFiled: February 5, 2020Publication date: August 5, 2021Inventors: Ralf Siemieniec, David Laforet, Cedric Ouvrard
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Publication number: 20210066459Abstract: A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a gate structure extending from a first surface into the semiconductor substrate, a plurality of needle-shaped first field plate structures extending from the first surface into the semiconductor substrate, body regions of a second conductivity type, and source regions of a first conductivity type formed between the body regions and the first surface. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The needle-shaped first field plate structures are arranged in a first pattern and the needle-shaped second field plate structures are arranged in a second pattern.Type: ApplicationFiled: November 16, 2020Publication date: March 4, 2021Inventors: Ralf Siemieniec, Oliver Blank, Franz Hirler, Michael Hutzler, David Laforet, Cédric Ouvrard, Li Juin Yip
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Patent number: 10879363Abstract: A power semiconductor die has a semiconductor body coupled to a first load terminal and a second load terminal of the power semiconductor die and configured to conduct a load current between the load terminals. The die further comprises: a control trench structure for controlling the load current, the control trench structure extending into the semiconductor body along a vertical direction and arranged in accordance with a horizontal grid pattern having a plurality of grid openings; a plurality of power cells, each power cell being, in a horizontal cross-section, at least partially arranged in a respective one of the plurality of grid openings.Type: GrantFiled: March 27, 2019Date of Patent: December 29, 2020Assignee: Infineon Technologies Austria AGInventors: Oliver Blank, Marcel Rene Mueller, Cedric Ouvrard
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Patent number: 10872957Abstract: A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a plurality of transistor cells and a gate structure that forms a grid separating transistor sections of the transistor cells from each other, each of the transistor sections including a needle-shaped first field plate structure extending from a first surface into the semiconductor substrate. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The first field plate structures form a first portion of a regular pattern and the second field plate structures form a second portion of the same regular pattern.Type: GrantFiled: November 22, 2019Date of Patent: December 22, 2020Assignee: Infineon Technologies Austria AGInventors: Ralf Siemieniec, Oliver Blank, Franz Hirler, Michael Hutzler, David Laforet, Cedric Ouvrard, Li Juin Yip
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Patent number: 10868173Abstract: A semiconductor device includes a semiconductor substrate having drift and body regions. The drift region includes upper and lower drift regions. An active area includes a plurality of spicular trenches extending through the body region and into the drift region. Each spicular trench in the active area has a lower end which together define a lower end of the upper drift region extending towards a first side and a lower drift region extending from the lower end of the upper drift region towards a second side. The edge termination area includes spicular termination trenches extending at least into the upper drift region. A surface doping region arranged in the upper drift region in the edge termination area extends to the first side, is spaced apart from the lower end of the upper drift region, and has a net doping concentration lower than that of the upper drift region.Type: GrantFiled: June 25, 2020Date of Patent: December 15, 2020Assignee: Infineon Technologies Austria AGInventors: Cedric Ouvrard, Adam Amali, Oliver Blank, Michael Hutzler, David Laforet, Harsh Naik, Ralf Siemieniec, Li Juin Yip
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Publication number: 20200365724Abstract: A semiconductor device includes a semiconductor body having first and second opposing surfaces, an active area including active transistor cells, and an edge termination region laterally surrounding the active area. Each active transistor cell includes a mesa and a columnar trench having a field plate. The edge termination region includes inactive cells each including a columnar termination trench having a field plate, and a termination mesa including a drift region of a first conductivity type. The edge termination region includes a transition region laterally surrounding the active region and an outer termination region laterally surrounding the transition region. In the transition region, the termination mesa includes a body region of a second conductivity type arranged on the drift region. In the outer termination region, the drift region extends to the first surface. A buried doped region of the edge termination region is positioned in the transition and outer termination regions.Type: ApplicationFiled: May 13, 2020Publication date: November 19, 2020Inventors: Ralf Siemieniec, Adam Amali, Michael Hutzler, Laszlo Juhasz, David Laforet, Cedric Ouvrard, Li Juin Yip
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Patent number: 10811531Abstract: Disclosed is a transistor device with at least one gate electrode, a gate runner connected to the at least one gate electrode and arranged on top of a semiconductor body, and a gate pad arranged on top of the semiconductor body and electrically connected to the gate runner. The gate runner includes a first metal line, a second metal line on top of the first metal line, a first gate runner section, and at least one second gate runner section. The at least one second gate runner section is arranged between the first gate runner section and the gate pad. A cross sectional area of the second metal line in the at least one second gate runner section is less than 50% of the cross sectional area of the second metal line in the first gate runner section.Type: GrantFiled: February 25, 2019Date of Patent: October 20, 2020Assignee: Infineon Technologies Austria AGInventors: David Laforet, Oliver Blank, Cesar Augusto Braz, Gerhard Noebauer, Cedric Ouvrard
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Publication number: 20200328303Abstract: A semiconductor device includes a semiconductor substrate having drift and body regions. The drift region includes upper and lower drift regions. An active area includes a plurality of spicular trenches extending through the body region and into the drift region. Each spicular trench in the active area has a lower end which together define a lower end of the upper drift region extending towards a first side and a lower drift region extending from the lower end of the upper drift region towards a second side. The edge termination area includes spicular termination trenches extending at least into the upper drift region. A surface doping region arranged in the upper drift region in the edge termination area extends to the first side, is spaced apart from the lower end of the upper drift region, and has a net doping concentration lower than that of the upper drift region.Type: ApplicationFiled: June 25, 2020Publication date: October 15, 2020Inventors: Cedric Ouvrard, Adam Amali, Oliver Blank, Michael Hutzler, David Laforet, Harsh Naik, Ralf Siemieniec, Li Juin Yip
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Patent number: 10727331Abstract: A semiconductor device includes a semiconductor substrate having drift and body regions. The drift region includes upper and lower drift regions. An active area includes a plurality of spicular trenches extending through the body region and into the drift region. Each spicular trench in the active area has a lower end which together define a lower end of the upper drift region extending towards a first side and a lower drift region extending from the lower end of the upper drift region towards a second side. The edge termination area includes spicular termination trenches extending at least into the upper drift region. A surface doping region arranged in the upper drift region in the edge termination area extends to the first side, is spaced apart from the lower end of the upper drift region, and has a net doping concentration lower than that of the upper drift region.Type: GrantFiled: June 29, 2018Date of Patent: July 28, 2020Assignee: Infineon Technologies Austria AGInventors: Cedric Ouvrard, Adam Amali, Oliver Blank, Michael Hutzler, David Laforet, Harsh Naik, Ralf Siemieniec, Li Juin Yip
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Publication number: 20200127102Abstract: A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a plurality of transistor cells and a gate structure that forms a grid separating transistor sections of the transistor cells from each other, each of the transistor sections including a needle-shaped first field plate structure extending from a first surface into the semiconductor substrate. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The first field plate structures form a first portion of a regular pattern and the second field plate structures form a second portion of the same regular pattern.Type: ApplicationFiled: November 22, 2019Publication date: April 23, 2020Inventors: Ralf Siemieniec, Oliver Blank, Franz Hirler, Michael Hutzler, David Laforet, Cedric Ouvrard, Li Juin Yip
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Patent number: 10629595Abstract: A power semiconductor device includes a semiconductor substrate having a first side. A plurality of active transistor cells is formed in an active area of the semiconductor substrate. Each of the plurality of active transistor cells includes a spicular trench which extends from the first side into the semiconductor substrate and has a field electrode. A gate electrode structure has a plurality of intersecting gate trenches running between the spicular trenches. The intersecting gate trenches form gate crossing regions of different shape when seen in a plan projection onto the first side of the power semiconductor device.Type: GrantFiled: June 27, 2018Date of Patent: April 21, 2020Assignee: Infineon Technologies Austria AGInventors: Cedric Ouvrard, Cesar Augusto Braz, Olivier Guillemant, David Laforet, Gerhard Noebauer, Li Juin Yip