Patents by Inventor Cengiz A. Palanduz

Cengiz A. Palanduz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9572258
    Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a substrate core by attaching a first dielectric layer to a second conductive layer of a thin film capacitor, and attaching a second dielectric layer to a first conductive layer of the thin film capacitor.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: February 14, 2017
    Assignee: Intel Corporation
    Inventors: Sriram Srinivasan, John S. Guzek, Cengiz A. Palanduz, Victor Prokofiev, Joel A. Auernheimer
  • Publication number: 20140111924
    Abstract: A process of forming a thin-film capacitor that includes sol-gel patterning of a dielectric thin film on a first electrode, lift-off removal of unwanted dielectric thin film, and mating the dielectric thin film with a second electrode. The thin-film capacitor exhibits a substantially uniform heat-altered morphology along a line defined by a characteristic dimension thereof. A computing system is also disclosed that includes the thin-film capacitor.
    Type: Application
    Filed: December 27, 2013
    Publication date: April 24, 2014
    Inventors: Huankiat SEH, Yongki MIN, Cengiz A. PALANDUZ
  • Patent number: 8652873
    Abstract: The present invention provides a thick-film paste for printing the front side of a solar cell device having one or more insulating layers and a method for doing so. The thick-film paste comprises a source of an electrically conductive metal and a lead-vanadium-based oxide dispersed in an organic medium. The invention also provides a semiconductor device comprising an electrode formed from the thick-film paste.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: February 18, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: Kenneth Warren Hang, Esther Kim, Brian J Laughlin, Kurt Richard Mikeska, Ahmet Cengiz Palanduz
  • Publication number: 20140038346
    Abstract: The present invention provides a thick-film paste for printing the front side of a solar cell device having one or more insulating layers and a method for doing so. The thick-film paste comprises a source of an electrically conductive metal and a lead-vanadium-based oxide dispersed in an organic medium. The invention also provides a semiconductor device comprising an electrode formed from the thick-film paste.
    Type: Application
    Filed: August 3, 2012
    Publication date: February 6, 2014
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: KENNETH WARREN HANG, Esther Kim, Brian J. Laughlin, Kurt Richard Mikeska, Ahmet Cengiz Palanduz
  • Patent number: 8623737
    Abstract: A process of forming a thin-film capacitor that includes sol-gel patterning of a dielectric thin film on a first electrode, lift-off removal of unwanted dielectric thin film, and mating the dielectric thin film with a second electrode. The thin-film capacitor exhibits a substantially uniform heat-altered morphology along a line defined by a characteristic dimension thereof. A computing system is also disclosed that includes the thin-film capacitor.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: January 7, 2014
    Assignee: Intel Corporation
    Inventors: Huankiat Seh, Yongki Min, Cengiz A. Palanduz
  • Patent number: 8499426
    Abstract: An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.
    Type: Grant
    Filed: July 7, 2008
    Date of Patent: August 6, 2013
    Assignee: Intel Corporation
    Inventor: Cengiz A. Palanduz
  • Patent number: 8264846
    Abstract: A ceramic package substrate has a recess. This allows a device in that recess to be close to a die attached to the substrate's top side, for better performance. The device may be an array capacitor, an in-silicon voltage regulator, or another device or devices.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: September 11, 2012
    Assignee: Intel Corporation
    Inventors: Christopher C. Jones, David Bach, Timothe Litt, Larry Binder, Kaladhar Radhakrishnan, Cengiz A. Palanduz
  • Patent number: 7986532
    Abstract: An apparatus includes a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits. Such capacitor may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: July 26, 2011
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Larry E. Mosley
  • Patent number: 7981741
    Abstract: Deposited thin-film dielectrics having columnar grains and high dielectric constants are formed on heat treated and polished metal foil. The sputtered dielectrics are annealed at low oxygen partial pressures.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: July 19, 2011
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Lijie Bao, Zhigang Rick Li, Damien Reardon, James F. Ryley, Cengiz A. Palanduz
  • Patent number: 7906843
    Abstract: A substrate and a method of making a substrate having a functionally gradient coefficient of thermal expansion are described herein. A system having a silicon die, an organic package substrate, and a substrate having a functionally gradient coefficient of thermal expansion, connecting the silicon die and the organic substrate is also described. The coefficient of thermal expansion at the upper surface of the substrate matches the coefficient of thermal expansion of the die, the coefficient of thermal expansion at the lower surface of the substrate matches the coefficient of thermal expansion of the package substrate, and the substrate has one or more coefficients of thermal expansion between the coefficients of thermal expansion of the upper and lower surfaces.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: March 15, 2011
    Assignee: Intel Corporation
    Inventor: A. Cengiz Palanduz
  • Patent number: 7810234
    Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: October 12, 2010
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Larry E. Mosley
  • Patent number: 7755165
    Abstract: A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: July 13, 2010
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Dustin P. Wood
  • Patent number: 7733626
    Abstract: A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material; and sintering the ceramic material. A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material so that the ceramic material is disposed between the first conductive material and the second conductive material; thermal processing at a temperature sufficient to sinter the ceramic material and form a film of the second conductive material; and coating an exposed surface of at least one of the first conduct material and the second conductive material with a different conductive material. An apparatus including first and second electrodes; and a ceramic material between the first electrode and the second electrode, wherein the ceramic material is sintered directly on one of the first and second electrode.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: June 8, 2010
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Yongki Min
  • Patent number: 7675160
    Abstract: In some embodiments, an individual sub-assembly containing a ceramic interposer, silicon voltage regulator, and array capacitor is presented. In this regard, an apparatus is introduced having a table-shaped ceramic interposer containing conductive traces, a silicon voltage regulator coupled with contacts on a first surface of the ceramic interposer, and an array capacitor coupled with contacts on a second surface of the ceramic interposer. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: March 9, 2010
    Assignee: Intel Corporation
    Inventors: Sriram Dattaguru, Larry Binder, Cengiz A. Palanduz, Chris Jones, Dave Bach, Kaladhar Radhakrishnan, Timothe Litt
  • Patent number: 7656644
    Abstract: A method including depositing a suspension of a colloid having an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device having a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate having at least one capacitor structure formed on a surface, the capacitor structure having a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material has columnar grains.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: February 2, 2010
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Dustin P. Wood
  • Patent number: 7638928
    Abstract: A piezo actuator includes a plurality of layers of ceramic material, a plurality of layers of conductive material interspersed between the plurality of layers of ceramic material, and a plate attached to an end of the actuator. The plate of the piezo actuator includes an overhang portion.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: December 29, 2009
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Ioan Sauciuc, Reza Paydar
  • Publication number: 20090316374
    Abstract: A method including forming a layer of a first ceramic material on a substrate; and after forming the layer, forming a second ceramic material on the layer of the first ceramic material, the formed second ceramic material including an average grain size less than a grain size of the first ceramic material. An apparatus including a first electrode; a second electrode; and a sintered ceramic material, wherein the ceramic material comprises first ceramic grains defining grain boundaries therebetween and second ceramic grains having an average grain size smaller than a grain size of the first ceramic grains. A system including a device including a microprocessor, the microprocessor coupled to a circuit board through a substrate, the substrate including a capacitor structure formed on a surface, the capacitor structure including a first electrode, a second electrode, and a sintered ceramic material disposed between the first electrode and the second electrode.
    Type: Application
    Filed: August 27, 2009
    Publication date: December 24, 2009
    Applicant: INTEL CORPORATION
    Inventor: Cengiz A. Palanduz
  • Patent number: 7636231
    Abstract: A thin-film capacitor assembly includes two plates that are accessed through deep and shallow vias. The thin-film capacitor assembly is able to be coupled with a spacer and an interposer. The thin-film capacitor assembly is also able to be stacked with a plurality of thin-film capacitor assemblies. The thin-film capacitor assembly is also part of computing system.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: December 22, 2009
    Assignee: Intel Corporation
    Inventors: John S. Guzek, Cengiz A. Palanduz, Victor Prokofiev
  • Patent number: 7629269
    Abstract: A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: December 8, 2009
    Assignee: Intel Corporation
    Inventor: Cengiz A. Palanduz
  • Publication number: 20090284944
    Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.
    Type: Application
    Filed: July 27, 2009
    Publication date: November 19, 2009
    Inventors: Cengiz A. Palanduz, Larry E. Mosley