Abstract: A semiconductor filter may be treated by fluorinating the surface of the filter. The filter has a polymer membrane held by a support structure within the filter's housing. The housing has an inlet and outlet for fluids being filtered, with the membrane held between the inlet and outlet. The support structure holds the membrane such that fluids flowing through the filter pass through the membrane. The treatment purges air from the filter before flowing a gas mixture including a fluorination agent through the filter, including the membrane.

Abstract: A semiconductor filter may be treated by fluorinating the surface of the filter. The filter has a polymer membrane held by a support structure within the filter's housing. The housing has an inlet and outlet for fluids being filtered, with the membrane held between the inlet and outlet. The support structure holds the membrane such that fluids flowing through the filter pass through the membrane. The treatment purges air from the filter before flowing a gas mixture including a fluorination agent through the filter, including the membrane.

Abstract: Methods are disclosed for modifying surfaces of a structure used in manufacturing semiconductor devices wherein the structures are formed from organic polymers. In addition to the surface of the structure, which is over a core, a portion of the structure slightly below the surface is also modified via fluorination of the organic polymer. The fluorination is achieved by exposing the structure to a mixture of gases including fluorine in a range from about 0.01% to about 10% and inert gas comprising a remainder of the mixture of gases. Fluorination occurs from the surface into the core to a depth of no more than about 1 micron and such that a portion of the core below more than 1 micron from the surface is not fluorinated.

Abstract: A method for patterning a substrate is provided, which comprises (a) providing a substrate; (b) applying a first layer comprising a first photo resist to the substrate; (c) applying a second layer comprising a second photo resist over the first layer; (d) patterning the second layer; and (e) inspecting the patterned second layer with an inspection tool; wherein at least one of the first and second layers comprises a contrasting agent which increases the contrast between the first and second layers to the inspection tool.

Abstract: A method includes forming an insulating layer over a substrate, forming a masking layer over the insulating layer, forming a developable bottom anti-reflective coating (BARC) over the masking layer, forming a first photo resist layer over the developable BARC, exposing and developing portions of both the first photo resist layer and the developable BARC to form a first set of openings in the developable BARC, forming a second photo resist layer over the first set of openings and the developable BARC, exposing and developing portions of both the second photo resist layer and the developable BARC to form a second set of openings in the developable BARC, and extending each opening in the first and second set of openings through the masking layer and the insulating layer.

Abstract: A method for patterning a substrate is provided, which comprises (a) providing a substrate; (b) applying a first layer comprising a first photo resist to the substrate; (c) applying a second layer comprising a second photo resist over the first layer; (d) patterning the second layer; and (e) inspecting the patterned second layer with an inspection tool; wherein at least one of the first and second layers comprises a contrasting agent which increases the contrast between the first and second layers to the inspection tool.

Abstract: A semiconductor device is made by patterning a conductive layer for forming gates of transistors. The process for forming the gates has a step of patterning photoresist that overlies the conductive layer. The patterned photoresist is trimmed so that its width is reduced. Fluorine, preferably F2, is applied to the trimmed photoresist to increase its hardness and its selectivity to the conductive layer. Using the trimmed and fluorinated photoresist as a mask, the conductive layer is etched to form conductive features useful as gates. Transistors are formed in which the conductive pillars are gates. Other halogens, especially chlorine, may be substituted for the fluorine.

Abstract: A semiconductor process and structure (32) uses a disposable sidewall spacer (42) associated with lightly doped drain (LDD) transistors. The disposable sidewall spacers are efficiently removed by a gaseous fluorine ambient. Either molecular or atomic fluorine gas is used to remove a silicon germanium sidewall spacer with high selectivity to exposed insulating layers. This etch process is also isotropic. An additional benefit of using a gaseous fluorine ambient is incorporation of fluorine in isolation regions (48) surrounding the transistors, thereby reducing the dielectric constant. Improved insulating properties of the isolations regions can allow increased integration.

Abstract: A semiconductor device is formed by patterning a resist layer using a rim phase shifting mask. A multilayer or single patterning layer to form the different phase-shifting regions and opaque regions is used to manufacture the rim phase shifting mask. First phase shifting regions are formed by transferring an opening in the multilayer or single patterning layer through an opaque layer and a transparent substrate. At least portions of the same multilayer or single patterning layer are used to recess the opaque layer a predetermined distance to form rims (second phase shifting regions). The first phase-shifting regions phase shift the light traveling through them 180 degrees relative to the light traveling through the rims, thereby increasing the contrast of the light traveling through the rim phase shifting mask.

Abstract: In semiconductor manufacturing, a pellicle film (28) is used to protect the surface of a reticle (24). The reticle (24) is used in an optical microlithography system (10) to pattern semiconductor wafers (18). To work properly, the pellicle (28) must be transparent at the particular wavelength of light used to expose photoresist through the reticle (24). The pellicle (28) is made more transparent to short wavelength light used by the optical microlithography system by removing unwanted hydrogen in the pellicle (28). The unwanted hydrogen is removed by exposing the pellicle (28) to a gas containing fluorine. This unwanted hydrogen apparently came as artifacts of the process of the making the pellicle (28), particularly the chemicals introduced to terminate the polymerization process and the ones used as solvents.

Abstract: A semiconductor device is formed by patterning a resist layer using a rim phase shifting mask. A multilayer or single patterning layer to form the different phase-shifting regions and opaque regions is used to manufacture the rim phase shifting mask. First phase shifting regions are formed by transferring an opening in the multilayer or single patterning layer through an opaque layer and a transparent substrate. At least portions of the same multilayer or single patterning layer are used to recess the opaque layer a predetermined distance to form rims (second phase shifting regions). The first phase-shifting regions phase shift the light traveling through them 180 degrees relative to the light traveling through the rims, thereby increasing the contrast of the light traveling through the rim phase shifting mask.

Abstract: A mask for use in semiconductor fabrication which includes a light transparent substrate, preferably glass, having a border and light semitransparent material having light transmissivity preferably in the range of from about 6 to about 10 percent disposed thereon within the border. A light opaque layer which is sensitive to light and which can be patterned and have a predetermined portion thereof removed in response to selective exposure to light is disposed along substantially the entire border of the substrate. The mask can further include a region of light semitransparent material disposed around the border and under the light opaque layer. The light opaque layer is preferably a photosensitive polyimide.

Abstract: A process for silylation of positive or negative photosensitive resist layer on a semiconductor wafer after the resist layer has been exposed to radiant energy through a mask which includes introducing a silylating agent to the wafer at high pressure over 760 torr and, usually, at temperatures less than 180.degree. C. Increased pressure increases the rate of silylation, allows practical use of lower process temperatures, and, therefore, allows better process control. Also an apparatus is disclosed for applying the high pressure silylation process to a wafer.

Abstract: A system and method whereby the uniformity of the silylating agent throughout the reaction chamber and primarily at the surface of the wafer is significantly improved to provide a significant improvement in the line width uniformity. In accordance with a first embodiment of the invention, this is accomplished by stagnant silylation wherein the silylating agent is introduced into the reaction chamber and the reaction chamber is then sealed during the entire time required to carry out the silylation. The advantage of this approach is optimum uniformity since once equilibrium has been reached, there is no net change of flow or pressure of the silylating agent across the wafer. Another advantage is reduction in the total consumption of the silylating and carrier gases. In accordance with a second embodiment of the invention, the silylating agent flows laminarly across the surface of the wafer to provide uniformity of the silylating agent at the wafer surface.

Abstract: A method for patterning an integrated circuit workpiece (10) includes forming a first layer (16) of organic material on the workpiece surface to a depth sufficient to allow a substantially planar outer surface (36) thereof. A second, polysilane-based resist layer (22) is spin-deposited on the first layer (16). A third resolution layer (24) is deposited on the second layer (22). The resolution layer (24) is selectively exposed and developed using standard techniques. The pattern in the resolution layer (24) is transferred to the polysilane layer (22) by either using exposure to deep ultraviolet or by a fluorine-base RIE etch. This is followed by an oxygen-based RIE etch to transfer the pattern to the surface (18) of the workpiece (10).

Abstract: A process for developing a photolithographic pattern on the surface of an exposed workpiece in a process chamber; disposing the workpiece in a process chamber; heating the workpiece and introducing a silylating agent to the process chamber and to a face of the workpiece to be processed; generating activated species from a source of oxygen; and introducing the activated species to the face of the workpiece.

Abstract: The present invention relates to a bilayer photoresist process, wherein a first planarizing resist layer is applied to a base and a second or top photoresist layer is applied over the first. The top layer resist is sensitive to deep UV light, while the planarizing layer resist is sensitive to near UV or violet light. The top layer, by use of a dye or other means, is opaque to predetermined near UV or violet wavelengths by which the planarizing layer is illuminated. The top layer is patterned using deep UV light. A flood exposure of the predetermined near UV or violet wavelengths is then used to transfer the pattern of the top layer to the bottom planarizing resist layer. Improved resolution is achieved by the use of deep UV light for patterning the top layer. Less costly yet faster illumination of the planarizing layer is accomplished by using near UV or violet light. Additionally pattern degradation due to spurious reflections normally occurring from near UV exposure of the top layer is avoided.