Patents by Inventor Cevat Kumbasar

Cevat Kumbasar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5266890
    Abstract: An integrated circuit test wafer quickly detects A-C defects in any process by which the wafer is fabricated. This test wafer includes a semiconductor substrate having a major surface, and a diagnostic circuit that is repeatedly integrated over most of the wafer's surface. Each diagnostic circuit includes: a) a plurality of ring oscillators which generate respective cyclic output signals; b) an addressing circuit that receives external input signals and in response selects an output signal from any particular ring oscillator of the plurality; c) a timing circuit that generates a timing signal with a certain time period; and, d) a counting circuit that counts the number of cycles that occur in the selected output signal during the time period and provides that number as an output.
    Type: Grant
    Filed: June 26, 1992
    Date of Patent: November 30, 1993
    Assignee: Unisys Corporation
    Inventors: Cevat Kumbasar, Jonathan A. Levi, Richard J. Petschauer, Roy R. Shanks, Steven S. Wei
  • Patent number: 5166660
    Abstract: A random access compare array, on an integrated circuit chip is comprised of a plurality of multi-bit comparator circuits. Each comparator circuit is coupled to a respective multi-bit register; and, each comparator circuit is also coupled to an address distribution circuit which receives a compare address and sends the compare address to all of the comparator circuits. A respective match signal is generated by each comparator circuit which indicates when the compare address and the content of the register that is coupled to the comparator are equal. Also, operating in parallel with the generation of the match signals is a match selection circuit which receives a select address and in response passes one match signal to a single output pin. Due to the parallel operation of the compare-select circuits, the speed of operation is greatly increased; and due to the selective passing of any of the match signals to a single output pin, the size of the array is not pin limited.
    Type: Grant
    Filed: September 19, 1991
    Date of Patent: November 24, 1992
    Assignee: UNISYS Corporation
    Inventors: LuVerne R. Peterson, Cevat Kumbasar
  • Patent number: 4897813
    Abstract: A non-reprogrammable ROM holding microinstruction words cooperates with a Content Addressable Memory made of a TAG Memory and Data Memory. Portions of the locations in the TAG Memory have the same address as certain locations in the ROM so that when these selected addresses occur, a multiplexer will select the updated data from the Data Memory rather that from the ROM. The entire system is placed on one chip and provides great spatial surface savings over that which would be required if only a Static RAM were used for a control storage unit to hold the microinstruction words.
    Type: Grant
    Filed: February 19, 1988
    Date of Patent: January 30, 1990
    Assignee: Unisys Corporation
    Inventor: Cevat Kumbasar