Abstract: A semiconductor device and a method of manufacturing the same, wherein first and second gate electrodes are formed to have a spacer shape. The length of an underlying dielectric film can be automatically controlled. A gate oxide film and a third gate electrode are formed between the first and second gate electrodes. Voids are not generated when burying the third conductive film. A thickness and width of the gate oxide film can be freely controlled.

Abstract: An oxide film is formed by a radical oxidization process and nitrogen is introduced into the oxide film by an annealing process using NO gas. The nitrogen gathered at the interface of the oxide film and a semiconductor substrate is re-distributed by an annealing process using a mixed gas including O2 and N2.

Abstract: A method is provided for fabricating a flash memory device, preventing particles from spreading around edges of a wafer while pre-cleaning a tunnel oxide film by removing particles at the edges of the wafer. Accordingly, it is able to overcome the problems arising from quality deterioration of the tunnel oxide film and defective patterns.

Abstract: The present invention relates to a method of manufacturing flash memory devices. According to the present invention, an inter-gate insulating film formed between a floating gate and a control gate is formed to have an NONON structure, thus removing the interface of polysilicon and an oxide film. It is thus possible to prevent a thickness of an inter-gate insulating film from increasing due to a subsequent oxidization process. Furthermore, the thickness of the inter-gate insulating film can be kept uniform regardless of the shape of a cell. It is thus possible to make uniform the operating speed among cells and also to reduce the slow program fail rate.

Abstract: Provided is a method for manufacturing a flash memory device, in which an oxidation process is carried out on the disclosed top surface of a semiconductor substrate to form a surface oxide film in the form of bird's beak with an appropriate width before conducting an etching process for trench. Thus, the present invention prevents the effect of thinning tunnel oxide film while reducing a critical dimension of an active region. And, it is possible to assure a normal cell operation by the Fowler-Nordheim (FN) tunneling effect owing to preventing the thinning tunnel oxide film.

Abstract: The present invention relates to a flash memory cell and method of manufacturing the same. The flash memory cell comprises a trench for defining a semiconductor substrate to be an active region and an inactive region, a trench insulating film burying the trench and having a given protrusion, an impurity region formed in the active region, a floating gate isolated by the protrusion and having rugged portions, and a dielectric film and a control gate formed on the floating gate. Therefore, the present invention can significantly simplify the process, improve the yield of a product and reduce the manufacturing cost.

Abstract: The present invention relates to a method for forming an isolation film in a semiconductor device. After a trench for isolation is formed, a polymer film is stripped by a post cleaning process using BFN. A pre-treatment cleaning process using only SC-1 is performed and a sidewall oxidization process is then carried out. It is therefore possible to improve fail of the roughness of the trench sidewall and to easily strip polymer. Furthermore, since a conventional PET process is omitted, an isolation film manufacturing process is simplified. It is also possible to prohibit out-diffusion of dopants injected into a semiconductor substrate through a pre-treatment cleaning process using CLN N before the sidewall oxidization process. Incidentally, by forming a slope at the top corner of the trench, it is possible to prevent a gate oxide film thinning phenomenon that the gate oxide film thinner than a desired thickness is deposited at the trench corner.

Abstract: Disclosed is a method for manufacturing a capacitor of a semiconductor device. The method includes the steps of providing a substrate having a storage node plug, forming a PE-TEOS layer and a hard mask exposing a storage node contact area on the substrate, forming a storage node contact having a side profile of a positive and negative pattern through etching the PE-TEOS layer, removing the hard mask by etching-back the hard mask, performing an annealing process with respect to a resultant structure, forming a silicon layer on the silicon substrate, which passes through the annealing process, coating a photoresist film on an entire surface of the substrate, forming a storage node electrode by etching-back the photoresist film and the silicon layer, removing a remaining photoresist film, and forming a dielectric layer and a silicon layer on a storage node electrode structure.

Abstract: Provided is a method of manufacturing a flash memory device, comprising the steps of; forming an undoped first poly silicon film on a semiconductor substrate; forming an undoped second poly silicon film having a high concentration doping area on the first poly silicon film; and forming a dielectric film on the resultant structure, so that doping concentrations of the first poly silicon film and the second poly silicon film come to be similar. Accordingly, the first poly silicon film and the second poly silicon film constituting the floating gate electrode have the same doping concentration, and therefore, it is possible to form the dielectric film having an effective thickness by minimizing a growth of a native oxide film on the resultant structure at the time of forming the dielectric film.