Patents by Inventor Cha Gyu Song

Cha Gyu Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210296263
    Abstract: A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film.
    Type: Application
    Filed: June 7, 2021
    Publication date: September 23, 2021
    Inventors: Jin Seong Kim, Byong Woo Cho, Cha Gyu Song
  • Patent number: 11031356
    Abstract: A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: June 8, 2021
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Jin Seong Kim, Byong Woo Cho, Cha Gyu Song
  • Publication number: 20200185338
    Abstract: A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film.
    Type: Application
    Filed: December 9, 2019
    Publication date: June 11, 2020
    Inventors: Jin Seong Kim, Byong Woo Cho, Cha Gyu Song
  • Patent number: 10504857
    Abstract: A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: December 10, 2019
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Jin Seong Kim, Byong Woo Cho, Cha Gyu Song
  • Publication number: 20190311991
    Abstract: A semiconductor device having an embedded semiconductor die and substrate-to-substrate interconnects is disclosed and may include a substrate with a top surface and a bottom surface, a semiconductor die bonded to the top surface of the substrate, a first mold material encapsulating the semiconductor die and at least a portion of the top surface of the substrate, and a first conductive bump that is on the top surface of the substrate and is at least partially encapsulated by the first mold material. An extended substrate may be coupled to the substrate utilizing the first conductive bump. A second conductive bump may be formed on the bottom surface of the substrate, and a second mold material may encapsulate at least a portion of the second conductive bump and at least a portion of the bottom surface of the substrate. A third mold material may be formed between the first mold material and the extended substrate.
    Type: Application
    Filed: May 21, 2019
    Publication date: October 10, 2019
    Inventors: Jin Seong Kim, Ye Sul Ahn, Cha Gyu Song
  • Patent number: 10297552
    Abstract: A semiconductor device having an embedded semiconductor die and substrate-to-substrate interconnects is disclosed and may include a substrate with a top surface and a bottom surface, a semiconductor die bonded to the top surface of the substrate, a first mold material encapsulating the semiconductor die and at least a portion of the top surface of the substrate, and a first conductive bump that is on the top surface of the substrate and is at least partially encapsulated by the first mold material. An extended substrate may be coupled to the substrate utilizing the first conductive bump. A second conductive bump may be formed on the bottom surface of the substrate, and a second mold material may encapsulate at least a portion of the second conductive bump and at least a portion of the bottom surface of the substrate. A third mold material may be formed between the first mold material and the extended substrate.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: May 21, 2019
    Assignee: Amkor Technology, Inc.
    Inventors: Jin Seong Kim, Ye Sul Ahn, Cha Gyu Song
  • Publication number: 20180204809
    Abstract: A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film.
    Type: Application
    Filed: March 13, 2018
    Publication date: July 19, 2018
    Inventors: Jin Seong Kim, Byong Woo Cho, Cha Gyu Song
  • Patent number: 9917063
    Abstract: A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: March 13, 2018
    Assignee: Amkor Technology, Inc.
    Inventors: Jin Seong Kim, Byong Woo Cho, Cha Gyu Song
  • Publication number: 20170162510
    Abstract: A semiconductor device having an embedded semiconductor die and substrate-to-substrate interconnects is disclosed and may include a substrate with a top surface and a bottom surface, a semiconductor die bonded to the top surface of the substrate, a first mold material encapsulating the semiconductor die and at least a portion of the top surface of the substrate, and a first conductive bump that is on the top surface of the substrate and is at least partially encapsulated by the first mold material. An extended substrate may be coupled to the substrate utilizing the first conductive bump. A second conductive bump may be formed on the bottom surface of the substrate, and a second mold material may encapsulate at least a portion of the second conductive bump and at least a portion of the bottom surface of the substrate. A third mold material may be formed between the first mold material and the extended substrate.
    Type: Application
    Filed: November 21, 2016
    Publication date: June 8, 2017
    Inventors: Jin Seong Kim, Ye Sul Ahn, Cha Gyu Song
  • Patent number: 9502392
    Abstract: A semiconductor device having an embedded semiconductor die and substrate-to-substrate interconnects is disclosed and may include a substrate with a top surface and a bottom surface, a semiconductor die bonded to the top surface of the substrate, a first mold material encapsulating the semiconductor die and at least a portion of the top surface of the substrate, and a first conductive bump that is on the top surface of the substrate and is at least partially encapsulated by the first mold material. An extended substrate may be coupled to the substrate utilizing the first conductive bump. A second conductive bump may be formed on the bottom surface of the substrate, and a second mold material may encapsulate at least a portion of the second conductive bump and at least a portion of the bottom surface of the substrate. A third mold material may be formed between the first mold material and the extended substrate.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: November 22, 2016
    Assignee: Amkor Technology, Inc.
    Inventors: Jin Seong Kim, Ye Sul Ahn, Cha Gyu Song
  • Publication number: 20150108643
    Abstract: A semiconductor device having an embedded semiconductor die and substrate-to-substrate interconnects is disclosed and may include a substrate with a top surface and a bottom surface, a semiconductor die bonded to the top surface of the substrate, a first mold material encapsulating the semiconductor die and at least a portion of the top surface of the substrate, and a first conductive bump that is on the top surface of the substrate and is at least partially encapsulated by the first mold material. An extended substrate may be coupled to the substrate utilizing the first conductive bump. A second conductive bump may be formed on the bottom surface of the substrate, and a second mold material may encapsulate at least a portion of the second conductive bump and at least a portion of the bottom surface of the substrate. A third mold material may be formed between the first mold material and the extended substrate.
    Type: Application
    Filed: October 23, 2014
    Publication date: April 23, 2015
    Inventors: Jin Seong Kim, Ye Sul Ahn, Cha Gyu Song
  • Publication number: 20150035141
    Abstract: A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Inventors: Jin Seong Kim, Byong Woo Cho, Cha Gyu Song