Patents by Inventor Cha-young Yoo

Cha-young Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11488845
    Abstract: In accordance with an exemplary embodiment, a substrate processing apparatus includes: a tube assembly having an inner space in which substrates are processed and assembled by laminating a plurality of laminates, each of which includes an injection part and an exhaust hole; a substrate holder configured to support the plurality of substrates in a multistage manner in the inner space; a supply line connected to one injection part of the plurality of laminates to supply a process gas; and an exhaust line connected to one of a plurality of exhaust holes to exhaust the process gas, and the substrate processing apparatus that has a simple structure and induces a laminar flow of the process gas to uniformly supply the process gas to a top surface of the substrate.
    Type: Grant
    Filed: September 5, 2016
    Date of Patent: November 1, 2022
    Inventors: Cha Young Yoo, Sung Tae Je, Kyu Jin Choi, Ja Dae Ku, Jun Kim, Bong Ju Jung, Kyung Seok Park, Yong Ki Kim, Jae Woo Kim
  • Publication number: 20220049349
    Abstract: According to an embodiment of the present invention, a method for forming a thin film includes loading an object to be processed into a chamber, and while controlling the temperature of the object to be processed to be 400° C. or less, supplying an Si source gas and an oxidizing gas into the chamber to form a silicon oxide film on the surface of the object to be processed, wherein the oxidizing gas is heated to a temperature exceeding 400° C. before being supplied into the chamber.
    Type: Application
    Filed: September 9, 2019
    Publication date: February 17, 2022
    Applicant: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Jin Woong KIM, Seung Woo SHIN, Cha Young YOO, Woo Duck JUNG, Doo Yeol RYU, Sung Kil CHO, Ho Min CHOI, Wan Suk OH, Koon Woo LEE, Ki Ho KIM
  • Publication number: 20220028658
    Abstract: A plasma treatment apparatus according to the present invention includes an induction chamber in which a source gas is introduced to generate plasma therein, a process chamber in which a substrate to be treated is treated by the plasma generated in the induction chamber, an inductively coupled plasma (ICP) antenna disposed outside the induction chamber and configured to form an inductive magnetic field so as to generate plasma from the source gas introduced into the induction chamber, and a high-frequency oscillator configured to apply a RF power to the ICP antenna.
    Type: Application
    Filed: October 5, 2021
    Publication date: January 27, 2022
    Applicant: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Jeong Hee JO, Yoon Seok CHOI, Zaretskiy SERGEY, Cha Young YOO
  • Patent number: 10840118
    Abstract: In accordance with an exemplary embodiment, a substrate processing apparatus includes: a tube assembly having an inner space in which substrates are processed and assembled by laminating a plurality of laminates, a substrate holder configured to support the plurality of substrates in a multistage manner in the inner space of the tube assembly, a gas supply unit installed on one side of the tube assembly to supply a process gas to each of the plurality of substrates in the inner space; and an exhaust unit connected to the tube assembly to exhaust the process gas supplied into the inner space, the substrate processing apparatus that induces a laminar flow to supply a uniform amount of process gas to a top surface of the substrate.
    Type: Grant
    Filed: September 5, 2016
    Date of Patent: November 17, 2020
    Assignee: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Cha Young Yoo, Sung Tae Je, Kyu Jin Choi, Ja Dae Ku, Jun Kim, Bong Ju Jung, Kyung Seok Park, Yong Ki Kim, Jae Woo Kim
  • Patent number: 10796915
    Abstract: Provided is a method for forming an epitaxial layer at a low temperature. The method for forming the epitaxial layer includes transferring a substrate into an epitaxial chamber and performing an epitaxial process on the substrate to form an epitaxial layer on the substrate. The epitaxial process includes heating the substrate at a temperature of about 700° C. or less and injecting a silicon gas into the epitaxial chamber in a state in which the inside of the epitaxial chamber is adjusted to a pressure of about 300 Torr or less to form a first epitaxial layer, stopping the injection of the silicon gas and injecting a purge gas into the epitaxial chamber to perform first purge inside the epitaxial chamber, heating the substrate at a temperature of about 700° C.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: October 6, 2020
    Assignee: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Doo Yeol Ryu, Seung Woo Shin, Cha Young Yoo, Woo Duck Jung, Ho Min Choi, Wan Suk Oh, Hui Sik Kim, Eun Ho Kim, Seong Jin Park
  • Publication number: 20200243301
    Abstract: A plasma treatment apparatus according to the present invention includes an induction chamber in which a source gas is introduced to generate plasma therein, a process chamber in which a substrate to be treated is treated by the plasma generated in the induction chamber, an inductively coupled plasma (ICP) antenna disposed outside the induction chamber and configured to form an inductive magnetic field so as to generate plasma from the source gas introduced into the induction chamber, and a high-frequency oscillator configured to apply a RF power to the ICP antenna.
    Type: Application
    Filed: October 2, 2018
    Publication date: July 30, 2020
    Applicant: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Jeong Hee JO, Yoon Seok CHOI, Zaretskiy SERGEY, Cha Young YOO
  • Publication number: 20190304785
    Abstract: Provided is a method for forming an epitaxial layer at a low temperature. The method for forming the epitaxial layer includes transferring a substrate into an epitaxial chamber and performing an epitaxial process on the substrate to form an epitaxial layer on the substrate. The epitaxial process includes heating the substrate at a temperature of about 700° C. or less and injecting a silicon gas into the epitaxial chamber in a state in which the inside of the epitaxial chamber is adjusted to a pressure of about 300 Torr or less to form a first epitaxial layer, stopping the injection of the silicon gas and injecting a purge gas into the epitaxial chamber to perform first purge inside the epitaxial chamber, heating the substrate at a temperature of about 700° C.
    Type: Application
    Filed: August 14, 2017
    Publication date: October 3, 2019
    Applicant: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Doo Yeol RYU, Seung Woo SHIN, Cha Young YOO, Woo Duck JUNG, Ho Min CHOI, Wan Suk OH, Hui Sik KIM, Eun Ho KIM, Seong Jin PARK
  • Patent number: 10364494
    Abstract: The present disclosure relates to a substrate processing apparatus, and more particularly, a substrate processing apparatus that is capable of improving process uniformity on an entire surface of a substrate. The substrate processing apparatus includes a substrate boat in which a substrate is loaded, a reaction tube in which a processing process for the substrate loaded in the substrate boat is performed, a gas supply unit configured to supply a process gas into the reaction tube through an injection nozzle disposed on one side of the reaction tube, a heating unit including a plurality of vertical heating parts, which are disposed along a circumference of the reaction tube outside the reaction tube and configured to divide the circumference to the reaction tube into a plurality of portions so as to independently heat each of the divided portions of the reaction tube, and a control unit configured to control the heating unit.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: July 30, 2019
    Assignee: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Cha Young Yoo, Sung Tae Je, Kyu Jin Choi, Ja Dae Ku, Jun Kim, Bong Ju Jung, Kyung Seok Park, Yong Ki Kim, Jae Woo Kim
  • Patent number: 10246773
    Abstract: A method for forming an amorphous thin film comprises: forming a seed layer on a surface of a base by supplying aminosilane-based gas on the base; forming the first boron-doped amorphous thin film by supplying the first source gas including boron-based gas on the seed layer; and forming the second boron-doped amorphous thin film by supplying the second source gas including boron-based gas on the first amorphous thin film.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: April 2, 2019
    Assignee: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Seung-Woo Shin, Cha-Young Yoo, Woo-Duck Jung, Ho-Min Choi, Wan-Suk Oh, Koon-Woo Lee, Hyuk-Lyong Gwon, Ki-Ho Kim
  • Publication number: 20180298493
    Abstract: In accordance with an exemplary embodiment, a substrate processing apparatus includes: a tube assembly having an inner space in which substrates are processed and assembled by laminating a plurality of laminates, each of which includes an injection part and an exhaust hole; a substrate holder configured to support the plurality of substrates in a multistage manner in the inner space; a supply line connected to one injection part of the plurality of laminates to supply a process gas; and an exhaust line connected to one of a plurality of exhaust holes to exhaust the process gas, and the substrate processing apparatus that has a simple structure and induces a laminar flow of the process gas to uniformly supply the process gas to a top surface of the substrate.
    Type: Application
    Filed: September 5, 2016
    Publication date: October 18, 2018
    Inventors: Cha Young YOO, Sung Tae JE, Kyu Jin CHOI, Ja Dae KU, Jun KIM, Bong Ju JUNG, Kyung Seok PARK, Yong Ki KIM, Jae Woo KIM
  • Publication number: 20180240696
    Abstract: In accordance with an exemplary embodiment, a substrate processing apparatus includes: a tube assembly having an inner space in which substrates are processed and assembled by laminating a plurality of laminates, a substrate holder configured to support the plurality of substrates in a multistage manner in the inner space of the tube assembly, a gas supply unit installed on one side of the tube assembly to supply a process gas to each of the plurality of substrates in the inner space; and an exhaust unit connected to the tube assembly to exhaust the process gas supplied into the inner space, the substrate processing apparatus that induces a laminar flow to supply a uniform amount of process gas to a top surface of the substrate.
    Type: Application
    Filed: September 5, 2016
    Publication date: August 23, 2018
    Inventors: Cha Young YOO, Sung Tae JE, Kyu Jin CHOI, Ja Dae KU, Jun KIM, Bong Ju JUNG, Kyung Seok PARK, Yong Ki KIM, Jae Woo KIM
  • Publication number: 20180112307
    Abstract: According to an embodiment of the present invention, provided is a method for forming an amorphous thin film, the method comprising: forming a seed layer on a surface of a base by supplying aminosilane-based gas on the base; forming the first boron-doped amorphous thin film by supplying the first source gas including boron-based gas on the seed layer; and forming the second boron-doped amorphous thin film by supplying the second source gas including boron-based gas on the first amorphous thin film.
    Type: Application
    Filed: May 9, 2016
    Publication date: April 26, 2018
    Applicant: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Seung-Woo SHIN, Cha-young YOO, Woo-Duck JUNG, Ho-Min CHOI, Wan-Suk OH, Koon-Woo LEE, Hyuk-Lyong GWON, Ki-Ho KIM
  • Publication number: 20170183771
    Abstract: The present disclosure relates to a substrate processing apparatus, and more particularly, a substrate processing apparatus that is capable of improving process uniformity on an entire surface of a substrate. The substrate processing apparatus includes a substrate boat in which a substrate is loaded, a reaction tube in which a processing process for the substrate loaded in the substrate boat is performed, a gas supply unit configured to supply a process gas into the reaction tube through an injection nozzle disposed on one side of the reaction tube, a heating unit including a plurality of vertical heating parts, which are disposed along a circumference of the reaction tube outside the reaction tube and configured to divide the circumference to the reaction tube into a plurality of portions so as to independently heat each of the divided portions of the reaction tube, and a control unit configured to control the heating unit.
    Type: Application
    Filed: October 10, 2016
    Publication date: June 29, 2017
    Inventors: Cha Young YOO, Sung Tae JE, Kyu Jin CHOI, Ja Dae KU, Jun KIM, Bong Ju JUNG, Kyung Seok PARK, Yong Ki KIM, Jae Woo KIM
  • Patent number: 9349583
    Abstract: Methods of fabricating a semiconductor device include forming a deposited film on a semiconductor substrate in a process chamber by repeatedly forming unit layers on the semiconductor substrate. The unit layer is formed by forming a preliminary unit layer on the semiconductor substrate by supplying a process material including a precursor material and film-control material into the process chamber, purging the process chamber, forming a unit layer from the preliminary unit layer, and again purging the process chamber. The precursor material includes a central atom and a ligand bonded to the central atom, and the film-control material includes a hydride of the ligand.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: May 24, 2016
    Assignee: Samsung Electronis Co., Ltd.
    Inventors: Min-Young Park, Youn-Soo Kim, Sang-Yeol Kang, Cha-Young Yoo, Jae-Soon Lim, Jae-Hyoung Choi
  • Patent number: 9076647
    Abstract: A method of forming an oxide layer. The method includes: forming a layer of reaction-inhibiting functional groups on a surface of a substrate; forming a layer of precursors of a metal or a semiconductor on the layer of the reaction-inhibiting functional groups; and oxidizing the precursors of the metal or the semiconductor in order to obtain a layer of a metal oxide or a semiconductor oxide. According to the method, an oxide layer having a high thickness uniformity may be formed and a semiconductor device having excellent electrical characteristics may be manufactured.
    Type: Grant
    Filed: April 28, 2012
    Date of Patent: July 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Suk-jin Chung, Youn-soo Kim, Cha-young Yoo, Jong-cheol Lee, Sang-yeol Kang
  • Patent number: 9059330
    Abstract: Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: June 16, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hyoung Choi, Jung-hee Chung, Cha-young Yoo, Young-sun Kim, Se-hoon Oh
  • Patent number: 8889560
    Abstract: Methods of forming fine patterns for a semiconductor device include forming a hard mask layer on an etch target layer; forming a carbon containing layer on the hard mask layer; forming carbon containing layer patterns by etching the carbon containing layer; forming spacers covering opposing side walls of each of the carbon containing layer patterns; removing the carbon containing layer patterns; forming hard mask patterns by etching the hard mask layer using the spacers as a first etching mask; and etching the etch target layer by using the hard mask patterns a second etching mask.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: November 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-hong Chung, Cha-young Yoo, Dong-hyun Kim
  • Patent number: 8790986
    Abstract: A method of manufacturing a semiconductor device, the method including: preparing a semiconductor substrate including a mold layer and a support layer disposed on the mold layer; forming multiple holes that pass through the mold layer and the support layer; forming multiple bottom electrodes in the holes; exposing at least a portion of the bottom electrodes by removing at least a portion of the mold layer; removing a portion of the bottom electrodes from an exposed surface of the bottom electrodes; and sequentially forming a dielectric layer and a top electrode layer on the bottom electrodes.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: July 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Hyoung Choi, Ki Yeon Park, Joon Kim, Cha Young Yoo, Youn Soo Kim, Ho Jun Kwon, Sang Yeol Kang
  • Patent number: 8723250
    Abstract: An electronic device includes a lower layer, a complex dielectric layer on the lower layer, and an upper layer on the complex dielectric layer. The complex dielectric layer includes an amorphous metal silicate layer and a crystalline metal-based insulating layer thereon. Related fabrication methods are also discussed.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: May 13, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-cheol Lee, Ki-yeon Park, Chun-hyung Chung, Cha-young Yoo
  • Publication number: 20130244445
    Abstract: Methods of fabricating a semiconductor device include forming a deposited film on a semiconductor substrate in a process chamber by repeatedly forming unit layers on the semiconductor substrate. The unit layer is formed by forming a preliminary unit layer on the semiconductor substrate by supplying a process material including a precursor material and film-control material into the process chamber, purging the process chamber, forming a unit layer from the preliminary unit layer, and again purging the process chamber. The precursor material includes a central atom and a ligand bonded to the central atom, and the film-control material includes a hydride of the ligand.
    Type: Application
    Filed: February 25, 2013
    Publication date: September 19, 2013
    Inventors: Min-Young Park, Youn-Soo Kim, Sang-Yeol Kang, Cha-Young Yoo, Jae-Soon Lim, Jae-Hyoung Choi