Patents by Inventor Chad E. Fogg
Chad E. Fogg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8824819Abstract: An apparatus includes at least one general purpose register and at least one special purpose register and an execution unit that executes at least two instructions in parallel, to decode variable length codes, wherein each of the instructions share use of the at least one general purpose register and the at least one special purpose register. In one example, a processor stores variable length code information among a plurality of general purpose registers and generates decoded variable length code information by decoding the at least one variable length code. The processor also stores the decoded variable length code information among the plurality of general purpose registers.Type: GrantFiled: November 28, 2011Date of Patent: September 2, 2014Assignee: ATI Technologies ULCInventors: Chad E. Fogg, Nital P. Patwa, Parin B. Dalal, Stephen C. Purcell, Korbin Van Dyke, Stephen C. Hale
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Publication number: 20120070094Abstract: An apparatus includes at least one general purpose register and at least one special purpose register and an execution unit that executes at least two instructions in parallel, to decode variable length codes, wherein each of the instructions share use of the at least one general purpose register and the at least one special purpose register. In one example, a processor stores variable length code information among a plurality of general purpose registers and generates decoded variable length code information by decoding the at least one variable length code. The processor also stores the decoded variable length code information among the plurality of general purpose registers.Type: ApplicationFiled: November 28, 2011Publication date: March 22, 2012Applicant: ATI TECHNOLOGIES ULCInventors: Chad E. Fogg, Nital P. Patwa, Parin B. Dalal, Stephen C. Purcell, Korbin Van Dyke, Steve C. Hale
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Patent number: 8086055Abstract: An apparatus includes at least one general purpose register and at least one special purpose register and an execution unit that executes at least two instructions in parallel, to decode variable length codes, wherein each of the instructions share use of the at least one general purpose register and the at least one special purpose register. In one example, a processor stores variable length code information among a plurality of general purpose registers and generates decoded variable length code information by decoding the at least one variable length code. The processor also stores the decoded variable length code information among the plurality of general purpose registers.Type: GrantFiled: April 22, 2009Date of Patent: December 27, 2011Assignee: ATI Technologies ULCInventors: Chad E. Fogg, Nital P. Patwa, Parin B. Dalal, Stephen C. Purcell, Korbin Van Dyke, Steve C. Hale
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Publication number: 20100208826Abstract: A method that decodes serially received MPEG variable length codes by executing instructions in parallel. The method includes an execution unit, which includes multiple pipelined functional units. The functional units execute at least two of the instructions in parallel. The instructions utilize and share general purpose registers. The general purpose registers store information used by at least two of the instructions.Type: ApplicationFiled: April 22, 2009Publication date: August 19, 2010Applicant: ATI International SRLInventors: Chad E. Fogg, Nital P. Patwa, Parin B. Dalal, Stephen C. Purcell, Korbin Van Dyke, Steve C. Hale
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Patent number: 7668242Abstract: A method of interfacing non-integrated media processing system elements is presented, the method comprising identifying one or more characteristics of one or more media processing system elements, and dynamically negotiating which system elements will perform certain media processing tasks based, at least in part, on the identified one or more characteristics of the system elements.Type: GrantFiled: October 4, 2004Date of Patent: February 23, 2010Assignee: Microsoft CorporationInventors: Gary J. Sullivan, Chad E. Fogg
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Patent number: 7596180Abstract: A multimedia application program interface (API), selectively invoked in a computing system to interface any video decoder application with any video accelerator is presented comprising a command data structure and a residual difference data structure. The residual difference data structure includes residual difference information for use among and between the decoder and the accelerator in the prediction process. The control command data structure includes control commands which are dynamically tailored to interface the decoder application with a hardware accelerator in accordance with an acceptable media processing standard negotiated between the decoder and the accelerator.Type: GrantFiled: August 26, 2004Date of Patent: September 29, 2009Assignee: Microsoft CorporationInventors: Gary J. Sullivan, Chad E. Fogg
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Patent number: 7574065Abstract: A method that decodes serially received MPEG variable length codes by executing instructions in parallel. The method includes an execution unit which includes multiple pipelined functional units. The functional units execute at least two of the instructions in parallel. The instructions utilize and share general purpose registers. The general purpose registers store information used by at least two of the instructions.Type: GrantFiled: June 10, 2004Date of Patent: August 11, 2009Assignee: ATI International SRLInventors: Chad E. Fogg, Nital P. Patwa, Parin B. Dalal, Stephen C. Purcell, Korbin Van Dyke, Steve C. Hale
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Patent number: 7428266Abstract: A method of interfacing non-integrated media processing system elements is presented, the method comprising identifying one or more characteristics of one or more media processing system elements, and dynamically negotiating which system elements will perform certain media processing tasks based, at least in part, on the identified one or more characteristics of the system elements.Type: GrantFiled: March 29, 2005Date of Patent: September 23, 2008Assignee: Microsoft CorporationInventors: Gary J. Sullivan, Chad E. Fogg
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Patent number: 6940912Abstract: A method of interfacing non-integrated media processing system elements is presented, the method comprising identifying one or more characteristics of one or more media processing system elements, and dynamically negotiating which system elements will perform certain media processing tasks based, at least in part, on the identified one or more characteristics of the system elements.Type: GrantFiled: April 20, 2001Date of Patent: September 6, 2005Assignee: Microsoft CorporationInventors: Gary J. Sullivan, Chad E. Fogg
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Patent number: 6891893Abstract: A multimedia application program interface (API), selectively invoked in a computing system to interface any video decoder application with any video accelerator is presented comprising a command data structure and a residual difference data structure. The residual difference data structure includes residual difference information for use among and between the decoder and the accelerator in the prediction process. The control command data structure includes control commands which are dynamically tailored to interface the decoder application with a hardware accelerator in accordance with an acceptable media processing standard negotiated between the decoder and the accelerator.Type: GrantFiled: April 20, 2001Date of Patent: May 10, 2005Assignee: Microsoft Corp.Inventors: Gary J. Sullivan, Chad E. Fogg
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Patent number: 6775414Abstract: A method that decodes serially received MPEG variable length codes by executing instructions in parallel. The method includes an execution unit which includes multiple pipelined functional units. The functional units execute at least two of the instructions in parallel. The instructions utilize and share general purpose registers. The general purpose registers store information used by at least two of the instructions.Type: GrantFiled: November 19, 1999Date of Patent: August 10, 2004Assignee: ATI International SRLInventors: Chad E. Fogg, Nital P. Patwa, Parin B. Dalal, Stephen C. Purcell, Korbin Van Dyke, Steve C. Hale
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Patent number: 6618508Abstract: A computer system that performs motion compensation pixels, the computer system includes a storage device; a memory unit that loads at least one error correction value and at least one reference component into the storage device; and a calculation unit coupled to receive the at least one reference component and the at least one error correction value from the storage device. The calculation unit determines multiple predicted components in parallel and stores the multiple predicted components into the storage device. The arrangement, i.e., field or frame type, of the at least one reference component can differ from the arrangement of the stored multiple predicted components.Type: GrantFiled: July 9, 1999Date of Patent: September 9, 2003Assignee: ATI International SRLInventors: Richard W. Webb, James T. Battle, Chad E. Fogg, Haitao Guo
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Publication number: 20020085021Abstract: A method of interfacing non-integrated media processing system elements is presented, the method comprising identifying one or more characteristics of one or more media processing system elements, and dynamically negotiating which system elements will perform certain media processing tasks based, at least in part, on the identified one or more characteristics of the system elements.Type: ApplicationFiled: April 20, 2001Publication date: July 4, 2002Inventors: Gary J. Sullivan, Chad E. Fogg
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Publication number: 20020065952Abstract: A multimedia application program interface (API), selectively invoked in a computing system to interface any video decoder application with any video accelerator is presented comprising a command data structure and a residual difference data structure. The residual difference data structure includes residual difference information for use among and between the decoder and the accelerator in the prediction process. The control command data structure includes control commands which are dynamically tailored to interface the decoder application with a hardware accelerator in accordance with an acceptable media processing standard negotiated between the decoder and the accelerator.Type: ApplicationFiled: April 20, 2001Publication date: May 30, 2002Inventors: Gary J. Sullivan, Chad E. Fogg
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Method and structure for performing motion estimation using reduced precision pixel intensity values
Patent number: 5712799Abstract: A method of approximating the pixel intensity values of a current block using the pixel intensity values of a search window, wherein the precision of the number of bits used to represent the pixel intensity values is reduced. The pixel intensity values of the pixels in the current block are averaged to determine a first average pixel intensity value. The pixel intensity values of the current block which have a pixel intensity value less than the first average pixel intensity value are averaged to determine a second average pixel intensity value. The pixel intensity values of the current block which have a pixel intensity value greater than the first average pixel intensity value are averaged to determine a third average pixel intensity value. The first, second and third average pixel intensity values are used to determine thresholded pixel intensity values for the current block pixels and the search window pixels, thereby creating a thresholded current block and a thresholded search window.Type: GrantFiled: April 4, 1995Date of Patent: January 27, 1998Assignee: Chromatic Research, Inc.Inventors: P. Michael Farmwald, Stephen C. Purcell, Andrew C. Hung, Chad E. Fogg