Abstract: An apparatus for providing head amplitude characterization using gain loops is disclosed. A variable gain amplifier (VGA) receiving input signals and generates a VGA output signal. A digital-to-analog converter (DAC) circuit provides a desired input signal to the VGA and a gain control loop drives the VGA to gain lock the VGA to the provided desired input signal. An analog-to-digital converter (ADC) provides a digital output representing an ADC code spread in response to the VGA output. A controller drives the DAC to provide the desired input signal to the VGA and generates control signals for controlling the ADC, the controller further determines read head channel amplitude based upon the signal provided to the DAC, the ADC code spread received from the ADC and gain code provided by the gain control loops.

Abstract: An apparatus for providing head amplitude characterization is disclosed. A DAC is used to apply known signals to a variable gain amplifier in the front end of a read channel. The signal is processed through the read channel and at the output of an ADC, the signal is read and used to determine the input channel amplitude. Knowing the amplitude of the two input signals, the ADC code spread and the two VGA gain codes, an equation is generated for determining the amplitude of a head.

Abstract: A method and structure for calibrating an analog to digital converter comprises an input signal; a driver receiving the input signal, wherein the driver outputs a driver output signal; a flash circuit receiving the driver output signal, wherein the flash circuit outputs a comparison result equaling 2n−1 digital outputs; an encoding logic unit encoding the comparison result into n digital bits as an output signal; a calibration engine outputting a calibration input adjust signal, a reference adjust signal, a driver gain adjust signal, a driver offset adjust signal; and a calibration input circuit receiving the calibration input adjust signal, wherein the driver receives the driver gain adjust signal and the driver offset adjust signal, wherein the flash circuit receives the reference adjust signal, wherein the calibration engine receives n digital bits, and controls an operation of the driver or flash circuit based on the output signal.

Abstract: A method and structure for calibrating an analog to digital converter comprises an input signal; a driver receiving the input signal, wherein the driver outputs a driver output signal; a flash circuit receiving the driver output signal, wherein the flash circuit outputs a comparison result equaling 2n−1 digital outputs; an encoding logic unit encoding the comparison result into n digital bits as an output signal; a calibration engine outputting a calibration input adjust signal, a reference adjust signal, a driver gain adjust signal, a driver offset adjust signal; and a calibration input circuit receiving the calibration input adjust signal, wherein the driver receives the driver gain adjust signal and the driver offset adjust signal, wherein the flash circuit receives the reference adjust signal, wherein the calibration engine receives n digital bits, and controls an operation of the driver or flash circuit based on the output signal.