Abstract: A first implant is performed into a substrate to form a well in which a plurality of transistors will be formed. Each transistor of a first subset of the plurality of transistors to be formed has a width that satisfies a predetermined width constraint and each transistor of a second subset has a width that does not satisfy the constraint. A second implant is performed at locations in the well in which transistors of the first subset will be formed and not at locations in the well in which transistors of the second subset will be formed. The transistors are formed, wherein a channel region of each transistor of the first subset is formed in a portion of the substrate which received the second implant and a channel region of each transistor of the second subset is formed in a portion of the substrate which did not receive the second implant.

Abstract: A first implant is performed into a substrate to form a well in which a plurality of transistors will be formed. Each transistor of a first subset of the plurality of transistors to be formed has a width that satisfies a predetermined width constraint and each transistor of a second subset has a width that does not satisfy the constraint. A second implant is performed at locations in the well in which transistors of the first subset will be formed and not at locations in the well in which transistors of the second subset will be formed. The transistors are formed, wherein a channel region of each transistor of the first subset is formed in a portion of the substrate which received the second implant and a channel region of each transistor of the second subset is formed in a portion of the substrate which did not receive the second implant.

Abstract: A first implant is performed into a substrate to form a well in which a plurality of transistors will be formed. Each transistor of a first subset of the plurality of transistors to be formed has a width that satisfies a predetermined width constraint and each transistor of a second subset has a width that does not satisfy the constraint. A second implant is performed at locations in the well in which transistors of the first subset will be formed and not at locations in the well in which transistors of the second subset will be formed. The transistors are formed, wherein a channel region of each transistor of the first subset is formed in a portion of the substrate which received the second implant and a channel region of each transistor of the second subset is formed in a portion of the substrate which did not receive the second implant.

Abstract: A first implant is performed into a substrate to form a well in which a plurality of transistors will be formed. Each transistor of a first subset of the plurality of transistors to be formed has a width that satisfies a predetermined width constraint and each transistor of a second subset has a width that does not satisfy the constraint. A second implant is performed at locations in the well in which transistors of the first subset will be formed and not at locations in the well in which transistors of the second subset will be formed. The transistors are formed, wherein a channel region of each transistor of the first subset is formed in a portion of the substrate which received the second implant and a channel region of each transistor of the second subset is formed in a portion of the substrate which did not receive the second implant.

Abstract: A method for forming a semiconductor device comprises providing a semiconductor substrate; forming a first stressor layer over a surface of the semiconductor substrate; selectively removing portions of the first stressor layer; forming a second stressor layer over the surface of the semiconductor substrate and the first stressor layer; and selectively removing portions of the second stressor layer using an isotropic etch. In one embodiment, the isotropic etch is a wet etch that selectively removes the second stressor layer without removing a significant amount of the first stressor layer and also planarizing a boundary between the first stressor layer and the second stressor layer.