Abstract: A method of enhancing picture quality of a video signal is disclosed. The method comprises the steps of generating an interpolated base frame image: receiving a first previously decoded difference picture; receding a second previously decoded difference picture; generating a combined motion compensated difference surface; and generating a temporally interpolated enhanced picture based upon the interpolated base frame image end the combined motion compensated difference surface. A circuit for enhancing picture quality of a video signal is also disclosed. The circuit comprises a base decoder generating a base image of a standard definition picture; a temporal predictive interpolator coupled to the base decoder and generating an interpolated block; and a summing circuit coupled to the temporal predictive interpolator. The summing circuit preferably adds the interpolated block and a difference block.

Abstract: A method and apparatus is provided for decoding an encoded baseline video stream and an enhancement stream. The baseline video stream is decoded, upscaled and enhanced by applying adaptive filters specified by the enhancement stream. Baseline upscaled images are then coded to motion compensate enhanced high resolution images using previously decoded enhanced images, thus recycling these enhanced images. The enhancement stream provides the best predictor method for the decoder to combine blocks from previous enhanced images and upscaled images to produce a motion compensated enhanced image. Likewise, forward and backward motion compensated images are blended according to feature classification and filter extraction methods provided by the enhancement stream to produce a bidirectionally predicted frame. Lastly, the decoder applies residual data from the enhancement stream to produce a completed enhanced image.

Abstract: A method of enhancing picture quality of a video signal is disclosed. The method comprises the steps of generating an interpolated base frame image; receiving a first previously decoded difference picture; receiving a second previously decoded difference picture; generating a combined motion compensated difference surface; and generating a temporally interpolated enhanced picture based upon the interpolated base frame image and the combined motion compensated difference surface. A circuit for enhancing picture quality of a video signal is also disclosed. The circuit comprises a base decoder generating a base image of a standard definition picture; a temporal predictive interpolator coupled to the base decoder and generating an interpolated block; and a summing circuit coupled to the temporal predictive interpolator. The summing circuit preferably adds the interpolated block and a difference block.

Abstract: A method of enhancing picture quality of a video signal is disclosed. The method comprises the steps of generating a interpolated base frame image; receiving a first previously decoded difference picture; receiving a second previously decoded difference picture; generating a combined motion compensated difference surface; and generating a temporally interpolated enhanced picture based upon the interpolated base frame image and the combined motion compensated difference surface. A circuit for enhancing picture quality of a video signal is also disclosed. The circuit comprising a base decoder generating a base image of a standard definition picture; a temporal predictive interpolator coupled to the base decoder and generating an interpolated block; and a summing circuit coupled to the temporal predictive interpolated. The summing circuit preferably adds the interpolated block and a difference block.

Abstract: A method of enhancing picture quality of a video signal is disclosed. The method comprises the steps of receiving base layer images of standard definition pictures from a base layer decoder; defining image areas of the standard definition pictures; classifying image areas into image types by assigning a class number; and generating enhanced pictures based upon the standard definition pictures and the classification of the image areas. A circuit for enhancing picture quality of a video signal is also disclosed. The circuit comprising a base layer decoder; a classifier coupled to the base layer decoder, the classifier generating a class number for image areas of a standard definition picture; a summing circuit coupled to the classifier; an exchange stream decoder coupled to the summing circuit, the exchange stream decoder generating an index; and a codebook table coupled to the summing circuit. The codebook table preferably stores a plurality of codevectors based upon the class number and the index.

Abstract: A method of enhancing picture quality of a video signal is disclosed. The method comprises the steps of receiving base layer images of standard definition pictures from a base layer decoder; defining image areas of the standard definition pictures; classifying image areas into image types by assigning a class number; and generating enhanced pictures based upon the standard definition pictures and the classification of the image areas. A circuit for enhancing picture quality of a video signal is also disclosed. The circuit comprising a base layer decoder; a classifier coupled to the base layer decoder, the classifier generating a class number for image areas of a standard definition picture; a summing circuit coupled to the classifier; an exchange stream decoder coupled to the summing circuit, the exchange stream decoder generating an index; and a codebook table coupled to the summing circuit. The codebook table preferably stores a plurality of codevectors based upon the class number and the index.

Abstract: A method of enhancing picture quality of a video signal is disclosed. The method comprises the steps of generating an interpolated base frame image; receiving a first previously decoded difference picture; receiving a second previously decoded difference picture; generating a combined motion compensated difference surface; and generating a temporally interpolated enhanced picture based upon the interpolated base frame image and the combined motion compensated difference surface. A circuit for enhancing picture quality of a video signal is also disclosed. The circuit comprising a base decoder generating a base image of a standard definition picture; a temporal predictive interpolator coupled to the base decoder and generating an interpolated block; and a summing circuit coupled to the temporal predictive interpolator. The summing circuit preferably adds the interpolated block and a difference block.

Abstract: The present invention provides advanced encoding and advanced reconstruction apparatus and methods enabling low bitrate, enhanced coding and quality-enhanced reconstruction, among other aspects. Preferably operating in accordance with a super-domain model, the invention enables the superimposed use of advanced coding tools such as for determining the susceptibility of image data to optimization and degradation avoidance. Other preferred tools also include multi-dimensional diffusion, registration, meta data utilization, advanced constructs, image representation optimization and efficiency optimization. Advanced decoding further enables maximized utilization of received enhanced image data and other information, also preferably in accordance with a super-domain model. Advanced encoding preferably comprises reverse-superresolution encoding and advanced decoding preferably comprises advanced superresolution decoding, which can further be conducted in a distributed and/or cooperative manner.

Abstract: A method of enhancing picture quality of a video signal is disclosed. The method comprises the steps of receiving an encoded video signal having a plurality of headers; maintaining a plurality of codebooks based upon the differences between a standard definition picture and a high definition picture; and providing a pointer to a particular codebook of the plurality of codebooks when decoding a frame of the video signal.

Abstract: A method of enhancing picture quality of a video signal is disclosed. The method comprises the steps of generating an interpolated base frame image; receiving a first previously decoded difference picture; receiving a second previously decoded difference picture; generating a combined motion compensated difference surface; and generating a temporally interpolated enhanced picture based upon the interpolated base frame image and the combined motion compensated difference surface. A circuit for enhancing picture quality of a video signal is also disclosed. The circuit comprising a base decoder generating a base image of a standard definition picture; a temporal predictive interpolator coupled to the base decoder and generating an interpolated block; and a summing circuit coupled to the temporal predictive interpolator. The summing circuit preferably adds the interpolated block and a difference block.

Abstract: A method of enhancing picture quality of a video signal is disclosed. The method comprises the steps of receiving base layer images of standard definition pictures from a base layer decoder; defining image areas of the standard definition pictures; classifying image areas into image types by assigning a class number; and generating enhanced pictures based upon the standard definition pictures and the classification of the image areas. A circuit for enhancing picture quality of a video signal is also disclosed. The circuit comprising a base layer decoder; a classifier coupled to the base layer decoder, the classifier generating a class number for image areas of a standard definition picture; a summing circuit coupled to the classifier; an exchange stream decoder coupled to the summing circuit, the exchange stream decoder generating an index; and a codebook table coupled to the summing circuit. The codebook table preferably stores a plurality of codevectors based upon the class number and the index.

Abstract: A digital signal processor having a generalized bit field extraction instruction which can be used to perform a bit field selection operation, a rotate left operation, a rotate right operation, a shift left operation, a logical shift right operation, an arithmetic shift right operation, and so forth.

Abstract: A method and apparatus is provided for decoding an encoded baseline video stream and an enhancement stream. The baseline video stream is decoded, upscaled and enhanced by applying adaptive filters specified by the enhancement stream. Baseline upscaled images are then coded to motion compensate enhanced high resolution images using previously decoded enhanced images, thus recycling these enhanced images. The enhancement stream provides the best predictor method for the decoder to combine blocks from previous enhanced images and upscaled images to produce a motion compensated enhanced image. Likewise, forward and backward motion compensated images are blended according to feature classification and filter extraction methods provided by the enhancement stream to produce a bidirectionally predicted frame. Lastly, the decoder applies residual data from the enhancement stream to produce a completed enhanced image.

Abstract: A processor having an architecture including an instruction with a source operand from which the processor derives at least one of an operand value and a control value. The source operand may directly specify the operand value or the control value, with the other being implicitly specified. Or, both may be implicitly specified and derived from the source operand value. At least one of the operand value and the control value is implicit, not specified. An ADDSRN instruction which performs addition and right shifting and rounding, in which one of the source operands is an encoded immediate which specifies the shift count N. The processor corrects after the addition and shifting for an absent rounding bias added 2N-1. The ADDSRN instruction is used in accelerating digital signal processing code sequences of the form dest:=(A+B+C+D . . .

Abstract: A processor having an architecture including an instruction with a source operand from which the processor derives at least one of an operand value and a control value. The source operand may directly specify the operand value or the control value, with the other being implicitly specified. Or, both may be implicitly specified and derived from the source operand value. At least one of the operand value and the control value is implicit, not specified. An ADDSRN instruction which performs addition and right shifting and rounding, in which one of the source operands is an immediate which specifies the shift count N and the processor derives a third added 2N?1, and the ADDSRN instruction is used in accelerating digital signal processing code sequences of the form dest:=(A+B+C+D . . .

Abstract: A processor having an architecture including an instruction with a source operand from which the processor derives at least one of an operand value and a control value. The source operand may directly specify the operand value or the control value, with the other being implicitly specified. Or, both may be implicitly specified and derived from the source operand value. At least one of the operand value and the control value is implicit, not specified.

Abstract: A method of interfacing non-integrated media processing system elements is presented, the method comprising identifying one or more characteristics of one or more media processing system elements, and dynamically negotiating which system elements will perform certain media processing tasks based, at least in part, on the identified one or more characteristics of the system elements.

Abstract: A method that decodes serially received MPEG variable length codes by executing instructions in parallel. The method includes an execution unit which includes multiple pipelined functional units. The functional units execute at least two of the instructions in parallel. The instructions utilize and share general purpose. registers. The general purpose. registers store information used by at least two of the instructions.

Abstract: A method of interfacing non-integrated media processing system elements is presented, the method comprising identifying one or more characteristics of one or more media processing system elements, and dynamically negotiating which system elements will perform certain media processing tasks based, at least in part, on the identified one or more characteristics of the system elements.

Abstract: A multimedia application program interface (API), selectively invoked in a computing system to interface any video decoder application with any video accelerator is presented comprising a command data structure and a residual difference data structure. The residual difference data structure includes residual difference information for use among and between the decoder and the accelerator in the prediction process. The control command data structure includes control commands which are dynamically tailored to interface the decoder application with a hardware accelerator in accordance with an acceptable media processing standard negotiated between the decoder and the accelerator.