Abstract: The present disclosure describes a system with a power management device, a wakeup circuit, a battery management device, and a connector. During a powered down mode of operation, the battery management device can provide, via the connector, a bias voltage to the wakeup circuit. In response to a wakeup switch being activated, the battery management device can provide a power supply (e.g., from a battery) to the power management device. Benefits of the wakeup circuit include (1) a reduction of battery consumption—and thus improving battery lifetime—when the electronic system is in a powered down mode of operation because the wakeup circuit has lower number of active components compared to other designs and (2) a non-complex wakeup circuit design because one or more existing connector interconnects between the power management device and the battery management device can be re-used during electronic system's powered down mode of operation.

Abstract: A programmable power distributing sequencer including a plurality of internal regulators, an internal memory adapted to store a user programmable script including instructions for sequentially enabling and disabling the regulators, and a controller adapted to enable and disable the regulators based on the script. The controller may receive the user programmable script from a programming source, such as an applications processor, an external memory, or external programming device. Before using the user programmable script, the controller may execute a default script stored in the internal memory to initially power up the programming source. The sequencer may further include an external port for similarly controlling one or more external regulators. The port may also be used to connect multiple sequencers together, such as in a cascaded, hierarchical, and/or redundant manner. Additionally, the sequencer may include a fault detection module for detecting faulty operating regulators.

Abstract: A programmable power distributing sequencer including a plurality of internal regulators, an internal memory adapted to store a user programmable script including instructions for sequentially enabling and disabling the regulators, and a controller adapted to enable and disable the regulators based on the script. The controller may receive the user programmable script from a programming source, such as an applications processor, an external memory, or external programming device. Before using the user programmable script, the controller may execute a default script stored in the internal memory to initially power up the programming source. The sequencer may further include an external port for similarly controlling one or more external regulators. The port may also be used to connect multiple sequencers together, such as in a cascaded, hierarchical, and/or redundant manner. Additionally, the sequencer may include a fault detection module for detecting faulty operating regulators.